L9678P datasheet(157/215 Pages) STMICROELECTRONICS

157 / 215 page

DS11626 Rev 9

157/216

L9678P, L9678P-S

Safing logic

214

Figure 49. Safing engine diagnostic logic

A configurable mask for each internal ARMxINT signal is available for all of the integrated

deployment loops (refer to ARMx assignment registers (LOOP_MATRIX_ARMx) on

page 102). The un-masked ARMxINT signal for each loop will enable the respective loop

drivers (refer to Figure 21).

Activation of VSF (regulation rail for High Side Safing FET) occurs upon ARMxINT or

FENH/FENL, depending on SPI configuration (refer to Figure 17). Actual High Side Safing

FET activation still requires microcontroller signal.

L9678P is able to provide arming signals to external deployment loops by means of the

discrete output ARM pin. The ARM pin can either output an arming signal generated by the

integrated safing engine or an arming signal made by the combination of FENH and FENL

input signals, coming from external safing logic.

Figure 50. ARM output control logic

GAPGPS01651

SPI Decode /

Threshold

Compare

SCLK_G

MOSI_G

MISO_G

CS_G

SAF_CS0

SAF_CS1

Pulse

Stretch

DSTEST(VSF)

DIAG STATE

DSTEST(ARM)

ARM1INT

ARMING STATE

ARM2INT

DSTEST(PULSE)

CH1PULSE

CH4PULSE

CH2PULSE

CH3PULSE

GAPGPS01658

ARM

WD1_LOCKOUT

SSM_RESET

ARM1INT

WD1_RUN

Safing

Engine

WD1_OVERRIDE

ARM2INT

FENL

FENH

SAFESEL

ARM_EN

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