DAC7568IAPWR.A datasheet(45/72 Pages) TI2

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DAC7568, DAC8168, DAC8568

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SBAS430F – JANUARY 2009 – REVISED APRIL 2018

Product Folder Links: DAC7568 DAC8168 DAC8568

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Device Functional Modes (continued)

(see Table 9, Table 10, and Table 11)

Method 2) To always enable the internal reference, write the 32-bit serial command shown in Table 10. When

the internal reference is always enabled, any power-down command to the DAC channels does not change the

internal reference operating mode. When performing a power cycle to reset the device, the internal reference is

switched off (default mode). In the default mode, the internal reference is powered down until a valid write

sequence is applied to power up the internal reference. When the internal reference is powered up, it remains

powered up, regardless of the state of the DACs.

Disabling Internal Reference:

To disable the internal reference, write the 32-bit serial command shown in Table 11. When performing a power

cycle to reset the device, the internal reference is switched off (default mode).

When the internal reference is operated in Flexible mode, Static mode is disabled and does not work. To switch

from Flexible mode to Static mode, use the command shown in Table 12.

Table 9. Write Sequence for Enabling Internal Reference (Flexible Mode)

(Internal Reference Powered On—09080000h)

DB31

DB27

DB23

DB19

DB4

DB0

|-- Prefix Bits --| |- Control Bits -|

| Address Bits |

|-------------------------------------- Data Bits --------------------------------------|

| Feature Bits |

Table 10. Write Sequence for Enabling Internal Reference (Flexible Mode)

(Internal Reference Always Powered On—090A0000h)

DB31

DB27

DB23

DB19

DB4

DB0

|-- Prefix Bits --| |- Control Bits -|

| Address Bits |

|-------------------------------------- Data Bits --------------------------------------|

| Feature Bits |

Table 11. Write Sequence for Disabling Internal Reference (Flexible Mode)

(Internal Reference Always Powered Down—090C0000h)

DB31

DB27

DB23

DB19

DB4

DB0

|-- Prefix Bits --| |- Control Bits -|

| Address Bits |

|-------------------------------------- Data Bits --------------------------------------|

| Feature Bits |

Table 12. Write Sequence for Switching from Flexible Mode to Static Mode for Internal Reference

(Internal Reference Always Powered Down—09000000h)

DB31

DB27

DB23

DB19

DB4

DB0

|-- Prefix Bits --| |- Control Bits -|

| Address Bits |

|-------------------------------------- Data Bits --------------------------------------|

| Feature Bits |

8.3.2

LDAC Functionality

The DAC7568, DAC8168, and DAC8568 offer both a software and hardware simultaneous update and control

function. The DAC double-buffered architecture has been designed so that new data can be entered for each

DAC without disturbing the analog outputs.

DAC7568, DAC8168, and DAC8568 data updates can be performed either in synchronous or in asynchronous

mode.

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