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DAC7568, DAC8168, DAC8568

SBAS430F – JANUARY 2009 – REVISED APRIL 2018

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Product Folder Links: DAC7568 DAC8168 DAC8568

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Copyright © 2009–2018, Texas Instruments Incorporated

Table of Contents

1

Features .................................................................. 1

2

Applications ........................................................... 1

3

Description ............................................................. 1

4

Revision History..................................................... 2

5

Device Comparison Table..................................... 3

6

Pin Configuration and Functions ......................... 4

7

Specifications......................................................... 5

7.1

Absolute Maximum Ratings .................................... 5

7.2

Electrical Characteristics.......................................... 5

7.3

Timing Requirements ............................................... 7

7.4

Typical Characteristics: Internal Reference .............. 9

7.5

Typical Characteristics: DAC at AVDD = 5.5 V........ 11

7.6

Typical Characteristics: DAC at AVDD = 3.6 V........ 21

7.7

Typical Characteristics: DAC at AVDD = 2.7 V........ 23

8

Detailed Description ............................................ 31

8.1

Functional Block Diagram ....................................... 31

8.2

Feature Description................................................. 31

8.3

Device Functional Modes........................................ 44

9

Application and Implementation ........................ 48

9.1

Application Information............................................ 48

9.2

Typical Applications - Microprocessor Interfacing... 48

10

Layout................................................................... 53

10.1

Layout Guidelines ................................................. 53

11

Device and Documentation Support ................. 54

11.1

Device Support .................................................... 54

11.2

Related Links ........................................................ 57

11.3

Receiving Notification of Documentation Updates 57

11.4

Community Resources.......................................... 57

11.5

Trademarks ........................................................... 57

11.6

Electrostatic Discharge Caution ............................ 57

11.7

Glossary ................................................................ 57

12

Mechanical, Packaging, and Orderable

Information ........................................................... 58

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision E (January 2014) to Revision F

Page

•

Updated data sheet to SDS standard .................................................................................................................................... 1

•

Added External reference current grades and updated typ values ....................................................................................... 6

•

Added Reference input impedance grades and updated typ values ..................................................................................... 6

•

Changed IDD Normal mode, internal reference switched on, AVDD = 3.6V to 5.5V, VINH = AVDD and VINL = GND

maximum value from 2.0mA to 2.5mA ................................................................................................................................... 7

Changes from Revision D (May 2012) to Revision E

Page

•

Changed bit value in last three rows of Power-Down Commands section in from '0' to '1' ................................................. 38

Changes from Revision C (February 2011) to Revision D

Page

•

Changed Logic Input HIGH Voltage parameter test condition into two rows ......................................................................... 7

Changes from Revision B (November 2010) to Revision C

Page

•

Changed Output Voltage parameter min/max values from 2.4895 and 2.5005 to 2.4975 and 2.5025, respectively............. 6

•

Changed Initial Accuracy parameter min/max values from –0.02 and 0.02 to –0.1 and 0.1, respectively ............................ 6

Changes from Revision A (April 2009) to Revision B

Page

•

Changed Logic Input LOW Voltage parameter maximum value from 0.8 to 0.3 × AVDD ....................................................... 7

•

Changed Logic Input HIGH Voltage parameter minimum value from 1.8 to 0.7 × AVDD ....................................................... 7

•

Updated Figure 122 .............................................................................................................................................................. 33