the actual polarity of the signal being sensed. A full-scale signal is defined when |VIN| ≥ |VClipping|. In this way,

differentiating between a missing AVDD and a full-scale input signal is possible on the system level.

DOUT

CLKIN

127 CLKIN cycles

127 CLKIN cycles

VIN

–64 mV

VIN ≥ 64 mV

DOUT

Figure 6-6. Full-Scale Output of the AMC0106M05

6.3.4.2 Output Behavior in Case of a Missing High-Side Supply

As shown in Figure 6-7, the device provides a constant bitstream of logic 0's at the output if the high-side supply

is missing. DOUT is permanently low when the high-side supply is missing. A one is not generated every 128

clock pulses, which differentiates this condition from a valid negative full-scale input. This feature helps identify

high-side power-supply problems on the board.

CLKIN

DOUT

AVDD

Data valid

Data valid

0

Figure 6-7. Output of the AMC0106M05 in Case of a Missing High-Side Supply

AMC0106M05

SBASAS7A – AUGUST 2024 – REVISED JUNE 2025

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