ADS5294IPFPR datasheet(49/82 Pages) TI2

49 / 82 page

Frame Clock

FCLK

Freq = fCLKIN/2

Input Clock

CLKIN

Freq = fCLKIN

D13

(D0)

Data bit in MSB First mode

Data bit in LSB First mode

Output Data

CHnOUT B

Byte-wise

Input Signal

Sample N

td cycles latency

D11

(D2)

D10

(D3)

(D4)

(D5)

(D6)

Output Data

CHnOUT A

Byte-wise

(D9)

(D10)

(D11)

(D12)

(D13)

D13

(D0)

(D7)

D12

(D1)

(D8)

Sample N-1

Output Data

CHnOUT B

Bit-wise

Output Data

CHnOUT A

Bit-wise

D10

(D3)

(D5)

(D7)

(D9)

(D11)

(D13)

D11

(D2)

(D4)

(D6)

(D8)

(D10)

(D12)

D11

(D2)

D10

(D3)

(D4)

(D5)

(D6)

(D7)

D13

(D0)

D12

(D1)

Output Data

CHnOUT B

Word-wise

(Sample N)

Output Data

CHnOUT A

Word-wise

(Sample N-1)

(D8)

(D9)

(D10)

(D11)

(D12)

(D13)

D11

(D2)

D10

(D3)

(D4)

(D5)

(D6)

D13

(D0)

D12

(D1)

(D9)

(D10)

(D11)

(D12)

(D13)

(D7)

(D8)

D12

(D1)

D13

(D0)

D10

(D3)

(D5)

(D7)

(D9)

(D11)

(D13)

D11

(D2)

(D4)

(D6)

(D8)

(D10)

(D12)

D12

(D1)

D13

(D0)

D11

(D2)

D10

(D3)

(D4)

(D5)

(D6)

(D7)

D13

(D0)

D12

(D1)

(D8)

(D9)

(D10)

(D11)

(D12)

(D13)

(D11)

(D13)

(D10)

(D12)

(D13)

(D5)

(D6)

(D12)

(D13)

(D12)

(D13)

ADS5294

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SLAS776E – NOVEMBER 2011 – REVISED APRIL 2018

Product Folder Links: ADS5294

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Figure 54. 14-Bit Word Wise

9.6.1.6 Digital Processing Blocks

The ADS5294 integrates a set of commonly-used digital functions to ease system design. These functions are

shown in the digital block diagram of Figure 55 and described in the following sections.

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