LP8728B-Q1

SNVSA70 – FEBRUARY 2015

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Typical Application (continued)

8.2.1 Design Requirements

DESIGN PARAMETER

EXAMPLE VALUE

Input voltage range (VIN)

4.5 V to 5.5 V

Buck converter output current

1 A maximum

Buck converter input capacitance

10 µF, 6.3 V

Buck converter output capacitance

10 µF, 6.3 V

Buck converter inductor

1.5 µH, 1.5 A

AVDD pin bypass capacitor

1 µF, 6.3 V

BYP pin bypass capacitor

1 µF, 6.3 V

8.2.2 Detailed Design Procedure

8.2.2.1 Inductor

The four converters operate with 1.5-µH inductors. The inductor has to be selected based on the DC resistance

and saturation current. The DC resistance of the inductor directly effects the efficiency of the converter.

Therefore, an inductor with the lowest possible DC resistance should be selected for good efficiency. The

inductor should have a saturation current rating equal or higher than the high-side switch current limit (1500 mA).

To minimize radiated noise shielded inductor should be used. The inductor should be placed as close to the

LP8728B-Q1 as possible, and the trace from the inductor to the buck converter switch pin needs to be wide

enough to withstand the high switching currents.

8.2.2.2 Input and Output Capacitors

Because buck converters have a discontinuous input current, a low equivalent series resistance (ESR) input

capacitor is required for the best input-voltage filtering and to minimize interference with other circuits caused by

high input voltage spikes. Each DC-DC converter requires a 10-µF ceramic input capacitor on its input pin

VIN_Bx. The input capacitor capacitance can be increased without any limit for better input voltage filtering.

Voltage rating of the capacitors should be at least 10V. A small 100-nF capacitor can be used in parallel to

minimize high-frequency interferences. Input capacitors should be placed as close to the VIN_Bx pins as

possible. Routing from input capacitor to VIN_Bx pins should be done on top layer without using any vias.

An output capacitor with a typical value of 10 µF is recommended for each converter. Ceramic capacitors with

low ESR value have lowest output voltage ripple and are recommended.

Some ceramic capacitors, especially those in small packages, exhibit a strong capacitance reduction with the

increased applied DC voltage (DC bias effect). The capacitance value can fall below half of the nominal

capacitance. This needs to be taken into consideration and, if necessary, use a capacitor with higher value or

higher voltage rating.

Table 1. Recommended External Components

COMPONENT

DESCRIPTION

VALUE

TYPE

EXAMPLE

MuRata,

CIN_B1,2,3,4

Buck regulator input capacitor

10 µF

Ceramic, 10 V, X7R

GRM21BR71A106KE51L

MuRata,

COUT_B1,2,3,4

Buck regulator output capacitor

10 µF

Ceramic, 10 V, X7R

GRM21BR71A106KE51L

MuRata,

CAVDD

AVDD pin input capacitor

1 µF

Ceramic, 10 V, X7R

GRM188R71A105KA61D

MuRata,

CBYP

Internal LDO bypass capacitor

1 µF

Ceramic, 10 V, X7R

GRM188R71A105KA61D

LSW1,2,3 4

Buck regulator inductor

1.5 µH

ISAT >1.5 A, DCR < 100 mΩ

TOKO MDT2520-CN1R5M

16

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