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LP8728B-Q1 bảng dữ liệu(PDF) 15 Page - Texas Instruments |
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LP8728B-Q1 bảng dữ liệu(HTML) 15 Page - Texas Instruments |
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15 / 24 page ![]() LP8728 FB_B1 SW_B1 VOUT1 FB_B2 SW_B2 VOUT2 FB_B3 SW_B3 VOUT3 FB_B4 SW_B4 VOUT4 1.5 µH EN_B1 EN_B2 EN_B3 EN_B4 PG_B1 PG_B2 PG_B3 PG_B4 Micro Controller DEFSEL AVDD BYP VIN VIN VIN_B1 VIN VIN_B2 VIN VIN VIN_B3 VIN_B4 VDDIO 1 µF 1 µF 10 µF 1.5 µH 1.5 µH 1.5 µH 10 µF 10 µF 10 µF 10 µF 10 µF 10 µF 10 µF LP8728B-Q1 www.ti.com SNVSA70 – FEBRUARY 2015 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information The LP8728B-Q1 is a quad-output Power Management Unit (PMU), optimized for low-power FPGAs, microprocessors, and DSPs. 8.2 Typical Application Figure 15 shows an example of a typical application. A microcontroller controls each buck converter with separate enable signals. All four power good signals are connected to a microcontroller with dedicated pullup resistors. If only one master power good signal is required all power good signals can be connected in parallel and pulled up with a single pullup resistor. VOUT3 output voltage can be selected with a DEFSEL input. If VOUT3 output voltage control is not required during operation, output voltage can be selected by connecting DEFSEL pin to VDDIO or to GND. Figure 15. LP8728B-Q1 Typical Application Schematic Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 15 Product Folder Links: LP8728B-Q1 |
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