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ST10F271Z1 bảng dữ liệu(PDF) 39 Page - STMicroelectronics |
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ST10F271Z1 bảng dữ liệu(HTML) 39 Page - STMicroelectronics |
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39 / 185 page ![]() ST10F271Z1 Internal Flash memory 39/185 Note: The write operation commands must be executed from another memory (internal RAM or external memory), as in ST10F269 device. In fact, due to IBus characteristics, it is not possible to perform write operation in Flash while fetching code from Flash. Moreover, direct addressing is not allowed for write accesses to IFlash control registers. This means that both address and data for a writing operation must be loaded in one of ST10 GPR register (R0...R15). Write operation on IBus registers is 16 bit wide. Example of indirect addressing mode MOV RWm, #ADDRESS; /*Load Add in RWm*/ MOV RWn, #DATA; /*Load Data in RWn*/ MOV [RWm], RWn; /*Indirect addressing*/ Word program Example: 32-bit word program of data 0xAAAAAAAA at address 0x025554 FCR0H|= 0x2000; /*Set WPG in FCR0H*/ FARL = 0x5554; /*Load Add in FARL*/ FARH = 0x0002; /*Load Add in FARH*/ FDR0L = 0xAAAA; /*Load Data in FDR0L*/ FDR0H = 0xAAAA; /*Load Data in FDR0H*/ FCR0H|= 0x8000; /*Operation start*/ Double word program Example: double word program (64-bit) of data 0x55AA55AA at address 0x035558 and data 0xAA55AA55 at address 0x03555C in IFlash Module. FCR0H |= 0x1000; /*Set DWPG/ FARL = 0x5558; /*Load Add in FARL*/ FARH = 0x0003; /*Load Add in FARH*/ FDR0L = 0x55AA; /*Load Data in FDR0L*/ FDR0H = 0x55AA; /*Load Data in FDR0H*/ FDR1L = 0xAA55; /*Load Data in FDR1L*/ FDR1H = 0xAA55; /*Load Data in FDR1H*/ FCR0H |= 0x8000; /*Operation start*/ Double word program is always performed on the double word aligned on a even word: bit ADD2 of FARL is ignored. Sector erase Example: sector erase of sectors B0F1 and B0F0 of bank 0 in IFlash module. FCR0H |= 0x0800; /*Set SER in FCR0H*/ FCR1L |= 0x0003; /*Set B0F1, B0F0*/ FCR0H |= 0x8000; /*Operation start*/ Suspend and resume Word program, double word program, and sector erase operations can be suspended in the following way: FCR0H |= 0x4000; /*Set SUSP in FCR0H*/ |
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