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SY75608 bảng dữ liệu(PDF) 6 Page - Microchip Technology

tên linh kiện SY75608
Giải thích chi tiết về linh kiện  8 or 12 Output Ultra-Low Additive Jitter
PDF  44 Pages
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Trang chủ  http://www.microchip.com
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SY75608 bảng dữ liệu(HTML) 6 Page - Microchip Technology

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SY75608/612
DS20006363D-page 6
2021 - 2023 Microchip Technology Inc. and its subsidiaries
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings †
Supply Voltage (VDD) ................................................................................................................................–0.5V to +4.6V
Input Voltage (VIN).............................................................................................................................–0.5V to VDD + 0.5V
Input ESD Protection (HBM) ......................................................................................................................................2 kV
Operating Ratings ‡
1.8V Operating Voltage (VDD) ...............................................................................................................+1.62V to +1.98V
2.5V Operating Voltage (VDD) ...............................................................................................................+2.25V to +2.75V
3.3V Operating Voltage (VDD) ...............................................................................................................+2.97V to +3.63V
† Notice: Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only
and functional operation is not implied at conditions other than those detailed in the operational sections of this data
sheet. Exposure to absolute maximum ratings conditions may affect device reliability.
‡ Notice: The data sheet limits are not guaranteed if the device is operated beyond the recommended operating
conditions.
ELECTRICAL CHARACTERISTICS
Electrical Characteristics: VDD = 3.3V ±10%, VDD = 2.5V ±10%, VDD = 1.8V ±10%, TA = –40°C to +105°C.
Parameter
Symbol
Min.
Typ.
Max.
Units
Conditions
Current Consumption
Core Device Current
IDD
—
13
15
mA
All outputs and XTAL disabled.
Both reference inputs fed with
100 MHz differential clock.
Core Device Current
IDD_XTAL
—
13
15
mA
All outputs disabled; XTAL circuit
enabled with 25 MHz Crystal
connected between XIN and XOUT
Current Dissipation per
LPHCSL Output (100Ω)
IDD_HCSL_100Ω
—
3.5
3.9
mA
Note 1
Current Dissipation per
LPHCSL Output (85Ω)
IDD_HCSL_85Ω
—
4.0
4.4
mA
Note 1
Power Supply Noise Rejection Ratio
Power Supply Noise
Rejection Ratio
PSNRRHCSL
—
70
—
dB
100 mVPP, 100 kHz noise injected
to VDD. Clock Frequency 100 MHz,
VDD = 3.3V
Input
Input Slew Rate
SRIN
0.6
—
—
V/ns
—
Differential Input High
Voltage
VIH
0.15
—
—
V
—
Differential Input Low
Voltage
VIL
—
—
–0.15
V
—
Input Voltage Swing
VASWING
0.15
—
—
V
—
Absolute Crossing Point
Voltage
VCROSS
0.25
—
0.55
V
—
Variation of VCROSS Over
All Edges
VCROSSDELTA
—
—
0.14
V
—
Voltage High for Control
Inputs
VIH_OE
0.7*VDD
—
—
V
—
Voltage Low for Control
Inputs
VIL_OE
—
—
0.3*VDD
V
—



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