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PIC12LF1552 bảng dữ liệu(PDF) 68 Page - Microchip Technology |
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PIC12LF1552 bảng dữ liệu(HTML) 68 Page - Microchip Technology |
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68 / 356 page ![]() PIC16LF1566/1567 DS40001817B-page 68 Preliminary 2015-2016 Microchip Technology Inc. 5.3 Clock Switching The system clock source can be switched between external and internal clock sources via software using the System Clock Select (SCS) bits of the OSCCON register. The following clock sources can be selected using the SCS bits: • Default system oscillator determined by FOSC bits in Configuration Words • Internal Oscillator Block (INTOSC) 5.3.1 SYSTEM CLOCK SELECT (SCS) BITS The System Clock Select (SCS) bits of the OSCCON register selects the system clock source that is used for the CPU and peripherals. • When the SCS bits of the OSCCON register = 00, the system clock source is determined by value of the FOSC<1:0> bits in the Configuration Words. • When the SCS bits of the OSCCON register = 1x, the system clock source is chosen by the internal oscillator frequency selected by the IRCF<3:0> bits of the OSCCON register. After a Reset, the SCS bits of the OSCCON register are always cleared. When switching between clock sources, a delay is required to allow the new clock to stabilize. These oscillator delays are shown in Table 5-1. TABLE 5-1: OSCILLATOR SWITCHING DELAYS Switch From Switch To Frequency Oscillator Delay Sleep LFINTOSC(1) MFINTOSC(1) HFINTOSC(1) 31 kHz 31.25 kHz-500 kHz 31.25kHz-16MHz Oscillator Warm-Up Delay TWARM(2) Sleep/POR EC(1) DC – 32 MHz 2 cycles LFINTOSC EC(1) DC – 32 MHz 1 cycle of each Any clock source MFINTOSC(1) HFINTOSC 31.25 kHz-500 MHz 31.25kHz-16MHz 2 s (approx.) Any clock source LFINTOSC 31 kHz 1 cycle of each PLL inactive PLL active 16-32 MHz 2 ms (approx.) Note 1: PLL inactive 2: See Section 25.0 “Electrical Specifications” |
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