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PCM1808 bảng dữ liệu(PDF) 4 Page - Texas Instruments

tên linh kiện PCM1808
Giải thích chi tiết về linh kiện  PCM1808 Single-Ended, Analog-Input 24-Bit, 96-kHz Stereo ADC
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PCM1808 bảng dữ liệu(HTML) 4 Page - Texas Instruments

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PCM1808
SLES177B – APRIL 2006 – REVISED AUGUST 2015
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings
over operating ambient temperature range (unless otherwise noted)
(1)
MIN
MAX
UNIT
VCC
Analog supply voltage
–0.3
6.5
V
VDD
Digital supply voltage
–0.3
4
V
Ground voltage differences
AGND, DGND
±0.1
V
LRCK, BCK, DOUT
–0.3
(VDD + 0.3 V) < 4
V
Digital input voltage
SCKI, MD0, MD1, FMT
–0.3
6.5
V
VINL, VINR,
Analog input voltage
–0.3 (VCC + 0.3 V) < 6.5
V
VREF
Input current (any pins except supplies)
±10
mA
TJ
Junction temperature
150
°C
Tstg
Storage temperature
–55
150
°C
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
VALUE
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1)
±4000
V(ESD)
Electrostatic discharge
V
Charged-device model (CDM), per JEDEC specification JESD22-C101,
±1500
all pins(2)
(1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2)
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating ambient temperature range (unless otherwise noted)
MIN NOM
MAX
UNIT
VCC
Analog supply voltage (see Power Supply Recommendations)
4.5
5
5.5
V
VDD
Digital supply voltage
2.7
3.3
3.6
V
Analog input voltage, full scale (–0 dB)
VCC = 5 V
3
Vp-p
VIH
(1)
High input logic level
2
VDD
VDC
VIL
(1)
Low input logic level
0
0.8
VDC
VIH
(2) (3)
High input logic level
2
5.5
VDC
VIL
(2) (3)
Low input logic level
0
0.8
VDC
Digital input logic family
TTL compatible
Digital input clock frequency, system clock
2.048
49.152
MHz
Digital input clock frequency, sampling clock
8
96
kHz
Digital output load capacitance
20
pF
TA
Operating ambient temperature range
–40
85
°C
TJ
Junction temperature
150
°C
(1)
Pins 7, 8: LRCK, BCK (Schmitt-trigger input, with 50-k
Ω typical pulldown resistor, in slave mode)
(2)
Pin 6: SCKI (Schmitt-trigger input, 5-V tolerant)
(3)
Pins 10–12: MD0, MD1, FMT (Schmitt-trigger input, with 50-k
Ω typical pulldown resistor, 5-V tolerant)
4
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Product Folder Links: PCM1808



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