3.2

March 26, 2021

ES9016K2M Datasheet

ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-

8800 • www.esstech.com

20

Register #21: GPIO Input Selection and OSF Bypass

8 bit, Read-Write Register, Default = 0x00

Bits

[7:6]

[5:4]

[3]

[2]

[1]

[0]

Mnemonic

gpio_input_sel2

gpio_input_sel1

reserved *

bypass_iir

reserved *

bypass_osf

Default

0

0

0

0

0

0

0

0

Bit

Mnemonic

Description

[7:6]

gpio_input_sel2

Selects which input will be selected when GPIOX = 1'b1

2'd0 = I2S data (default)

2'd1 = SPDIF data

2’d2 = reserved

2'd3 = DSD data

[5:4]

gpio_input_sel1

Selects which input will be selected when GPIOX = 1'b0

2'd0 = I2S data (default)

2'd1 = SPDIF data

2’d2 = reserved

2'd3 = DSD data

[3]

reserved *

[2]

bypass_iir

1'b0 = Use the IIR filter (default)

1'b1 = Bypass the IIR filter.

[3]

reserved *

[0]

bypass_osf

1'b0 = Use the interpolating 8x FIR filter (default)

1'b1 = Bypass the interpolating 8x FIR filter.

Note: Bypassing the interpolating filter requires that the input data be

oversampled at 8x fs by an external oversampling filter.

* All Reserved Bits in Register #21 must be set to the indicated logic level to ensure correct device operation.

Note: Any of the GPIO can be configured to be used as an input select. This allows an external MCU or controller to set the

input type by setting the GPIO to either logic high (1'b1) or logic low (1'b0). To set this feature, the first step is to enable one

of the GPIO as an input select by setting gpio_cfg to 4'd9. Once a GPIO is configured as an input select it has the ability to

select between two different inputs. The first input (logic low) is set via register 21[5:4]. The second input (logic high) is set

via register 21[7:6].

Register #23-22: 2nd Harmonic Compensation Coefficients

16 bit, Read-Write Register, Default = 0x0000 (no compensation). Register #23 is MSB. See Register #13 for more details.

Bits

[15:0]

Mnemonic

Thd_comp_c2

Default

16’d0

Register #25-24: 3rd Harmonic Compensation Coefficients

16 bit, Read-Write Register, Default = 0x0000 (no compensation). Register #25 is MSB. See Register #13 for more details.

Bits

[15:0]

Mnemonic

Thd_comp_c3

Default

16’d0