MPC8358E datasheet(12/96 Pages) FREESCALE

12 / 96 page

MPC8358E PowerQUICC™ II Pro Processor Revision 2.1 PBGA Silicon Hardware Specifications, Rev. 1

Freescale Semiconductor

Power Characteristics

fully ramp up. In the case where the core voltage is applied first, the core voltage supply must rise to 90%

of its nominal value before the I/O supplies reach 0.7 V, see Figure 4.

Figure 4. Power Sequencing Example

I/O voltage supplies (GVDD, LVDD, and OVDD) do not have any ordering requirements with respect to one

another.

2.2.2

Power-Down Sequencing

The MPC8358E does not require the core supply voltage and I/O supply voltages to be powered-down in

any particular order.

Power Characteristics

The estimated typical power dissipation values are shown in Table 4.

Table 4. MPC8358E PBGA Core Power Dissipation1

Core

Frequency (MHz)

CSB

Frequency (MHz)

QUICC Engine

Frequency (MHz)

Typical

Maximum

Unit

Notes

266

2.2

2.3

2, 3, 4

400

266

2.4

2.5

2, 3, 4

Notes:

1. The values do not include I/O supply power (OVDD, LVDD, GVDD) or AVDD. For I/O power values, see Table 5.

2. Typical power is based on a voltage of VDD = 1.2 V, a junction temperature of TJ = 105°C, and a Dhrystone benchmark

application.

3. Thermal solutions will likely need to design to a value higher than typical power on the end application, TA target, and I/O

power.

4. Maximum power is based on a voltage of VDD = 1.2 V, WC process, a junction TJ = 105°C, and an artificial smoke test.

I/O Voltage (GVDD, LVDD, OVDD)

Core Voltage (VDD, AVDD)

90%

0.7 V

Time

Voltage

MPC8358E bảng dữ liệu(PDF) 12 Page - Freescale Semiconductor, Inc

MPC8358E bảng dữ liệu(HTML) 12 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96

bảng dữ liệu tải về

Link URL