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MPC8358E bảng dữ liệu(PDF) 93 Page - Freescale Semiconductor, Inc |
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MPC8358E bảng dữ liệu(HTML) 93 Page - Freescale Semiconductor, Inc |
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93 / 96 page ![]() MPC8358E PowerQUICC™ II Pro Processor Revision 2.1 PBGA Silicon Hardware Specifications, Rev. 1 Freescale Semiconductor 93 System Design Information Figure 54. Driver Impedance Measurement The value of this resistance and the strength of the driver’s current source can be found by making two measurements. First, the output voltage is measured while driving logic 1 without an external differential termination resistor. The measured voltage is V1 = Rsource × Isource. Second, the output voltage is measured while driving logic 1 with an external precision differential termination resistor of value Rterm. The measured voltage is V2 = 1/(1/R1 +1/R2)) × Isource. Solving for the output impedance gives Rsource = Rterm × (V 1/V2 – 1). The drive current is then Isource =V1/Rsource. Table 77 summarizes the signal impedance targets. The driver impedance are targeted at minimum VDD, nominal OVDD, 105°C. 24.6 Configuration Pin Muxing The device provides the user with power-on configuration options which can be set through the use of external pull-up or pull-down resistors of 4.7 k Ω on certain output pins (see customer visible configuration pins). These pins are generally used as output only pins in normal operation. While HRESET is asserted however, these pins are treated as inputs. The value presented on these pins while HRESET is asserted, is latched when HRESET deasserts, at which time the input receiver is disabled Table 77. Impedance Characteristics Impedance Local Bus, Ethernet, DUART, Control, Configuration, Power Management PCI DDR DRAM Symbol Unit RN 42 Target 25 Target 20 Target Z0 W RP 42 Target 25 Target 20 Target Z0 W Differential NA NA NA ZDIFF W Note: Nominal supply voltages. See Table 1, TJ = 105°C. OVDD OGND RP RN Pad Data SW1 SW2 |
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