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PCA2129T/Q900/2 bảng dữ liệu(PDF) 65 Page - NXP Semiconductors

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Giải thích chi tiết về linh kiện  Automotive accurate RTC with integrated quartz crystal
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PCA2129T/Q900/2 bảng dữ liệu(HTML) 65 Page - NXP Semiconductors

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PCA2129
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 5 — 19 December 2014
65 of 84
NXP Semiconductors
PCA2129
Automotive accurate RTC with integrated quartz crystal
14. Dynamic characteristics
14.1 SPI-bus timing characteristics
[1]
No load value; bus is held up by bus capacitance; use RC time constant with application values.
Table 81.
SPI-bus characteristics
VDD = 1.8 V to 4.2 V; VSS =0V; Tamb = 40 C to +85 C, unless otherwise specified. All timing values are valid within the
operating supply voltage at ambient temperature and referenced to VIL and VIH with an input voltage swing of VSS to VDD (see
Figure 44).
Symbol
Parameter
Conditions
VDD =1.8 V
VDD =4.2 V
Unit
Min
Max
Min
Max
Pin SCL
fclk(SCL)
SCL clock frequency
-
2.0
-
6.5
MHz
tSCL
SCL time
800
-
140
-
ns
tclk(H)
clock HIGH time
100
-
70
-
ns
tclk(L)
clock LOW time
400
-
70
-
ns
tr
rise time
for SCL signal
-
100
-
100
ns
tf
fall time
for SCL signal
-
100
-
100
ns
Pin SDA/CE
tsu(CE_N)
CE_N set-up time
60
-
30
-
ns
th(CE_N)
CE_N hold time
40
-
25
-
ns
trec(CE_N)
CE_N recovery time
100
-
30
-
ns
tw(CE_N)
CE_N pulse width
-
0.99
-
0.99
s
Pin SDI
tsu
set-up time
set-up time for SDI data
70
-
20
-
ns
th
hold time
hold time for SDI data
70
-
20
-
ns
Pin SDO
td(R)SDO
SDO read delay time
CL = 50 pF
-
225
-
55
ns
tdis(SDO)
SDO disable time
[1] -90
-25
ns
tt(SDI-SDO)
transition time from
SDI to SDO
to avoid bus conflict
0
-
0
-
ns



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