13892 datasheet(89/158 Pages) FREESCALE

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FUNCTIONAL DEVICE OPERATION

BATTERY INTERFACE AND CONTROL

Analog Integrated Circuit Device Data



Freescale Semiconductor

MC13892

BATTERY INTERFACE AND CONTROL

The battery management interface is optimized for applications with a single charger connector to which a standard wall

charger or a USB host can be connected. It can also support dead battery operation and unregulated chargers.

CHARGE PATH

CHARGER LINE UP

The charge path is depicted in the following diagram.

Figure 26. Charge Path Block Diagram

Transistors M1 and M2 control the charge current and provide voltage regulation. The latter is used as the top off change

voltage, and as the regulated supply voltage to the application in case of a dead battery operation. In order to support dead

battery operation, a so called “serial path” charging configuration including M3 needs to be used. Then in case of a dead battery,

the transistor M3 is made non-conducting and the internal trickle charge current charges the battery. If the battery is sufficiently

charged, the transistor M3 is made conducting which connects the battery to the application just like during normal operation

without a charger. In so called single path charging, M3 is replaced by a short and the pin BATTFET must be floating. Dead

battery operation is not supported in this case. Transistors M1 and M2 become non-conducting if the charger voltage is too high.

The VBUS must be shorted to CHRGRAW in cases where the wall charger and VBUS voltages are contained on a common pin.

A current can be supplied from the battery to an accessory with all transistors M1, M2, and M3 conducting, by enabling the

reverse supply mode. An unregulated wall charger configuration can be built, in which case CHRGSE1B must be pulled low. The

battery current monitoring resistor R1 and the charge LED indicator are optional. More detail on the battery current monitoring

can be found in ADC Subsystem.

The preferred devices for M1 and M2 are Fairchild™ FDZ193P, due to their small package outline and thermal characteristics.

The preferred device for M3 is the On Semiconductor NTHS2101P for its low RDSON and small footprint.

CHARGER SIGNALS

The charger uses a number of thresholds for proper operation and will also signal various events to the processor through

interrupts. Table 61 summarizes the main signals given, including the control bits. For details see the related sections in this

chapter and the SPI bit summary in SPI Bitmap.

Table 61. Main Control Bit Signals

Name

Description

Control Bits

VCHRG[2:0]

Charger regulator voltage setting

ICHRG[3:0]

Charger regulator current setting

TREN

Internal trickle charger enabling

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