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TMP86CS64AFG bảng dữ liệu(PDF) 150 Page - Toshiba Semiconductor

tên linh kiện TMP86CS64AFG
Giải thích chi tiết về linh kiện  8 Bit Microcontroller
PDF  202 Pages
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nhà sản xuất  TOSHIBA [Toshiba Semiconductor]
Trang chủ  http://www.semicon.toshiba.co.jp/eng
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TMP86CS64AFG bảng dữ liệu(HTML) 150 Page - Toshiba Semiconductor

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Page 140
14. Asynchronous Serial interface (UART )
14.5 Transfer Rate
TMP86CS64AFG
14.5 Transfer Rate
The baud rate of UART is set of UARTCR1<BRG>. The example of the baud rate are shown as follows.
When TC4 is used as the UART transfer rate (when UARTCR1<BRG> = “110”), the transfer clock and transfer
rate are determined as follows:
Transfer clock [Hz] = TC4 source clock [Hz] / TTREG4 setting value
Transfer Rate [baud] = Transfer clock [Hz] / 16
14.6 Data Sampling Method
The UART receiver keeps sampling input using the clock selected by UARTCR1<BRG> until a start bit is
detected in RXD1 pin input. RT clock starts detecting “L” level of the RXD1 pin. Once a start bit is detected, the
start bit, data bits, stop bit(s), and parity bit are sampled at three times of RT7, RT8, and RT9 during one receiver
clock interval (RT clock). (RT0 is the position where the bit supposedly starts.) Bit is determined according to major-
ity rule (The data are the same twice or more out of three samplings).
Figure 14-5 Data Sampling Method
Table 14-1 Transfer Rate (Example)
BRG
Source Clock
16 MHz
8 MHz
4 MHz
000
76800 [baud]
38400 [baud]
19200 [baud]
001
38400
19200
9600
010
19200
9600
4800
011
9600
4800
2400
100
4800
2400
1200
101
2400
1200
600
RT0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 0
1
2
3
4
5
6
7
8
9 10 11
Bit 0
Start bit
Bit 0
Start bit
(a) Without noise rejection circuit
RT clock
Internal receive data
RT0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 0
1
2
3
4
5
6
7
8
9 10 11
Bit 0
Start bit
Bit 0
Start bit
RT clock
Internal receive data
(b) With noise rejection circuit
RXD1 pin
RXD1 pin



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