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TMP86CS64AFG bảng dữ liệu(PDF) 146 Page - Toshiba Semiconductor

tên linh kiện TMP86CS64AFG
Giải thích chi tiết về linh kiện  8 Bit Microcontroller
PDF  202 Pages
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nhà sản xuất  TOSHIBA [Toshiba Semiconductor]
Trang chủ  http://www.semicon.toshiba.co.jp/eng
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TMP86CS64AFG bảng dữ liệu(HTML) 146 Page - Toshiba Semiconductor

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Page 136
14. Asynchronous Serial interface (UART )
14.2 Control
TMP86CS64AFG
14.2 Control
UART is controlled by the UART Control Registers (UARTCR1, UARTCR2). The operating status can be moni-
tored using the UART status register (UARTSR).
TXD1 pin and RXD1 pin can be selected a port assignment by UART Pin Select Register (SCISEL). And Infrared
data format (IrDA) output is available by setting IrDA output control register (IRDACR) through TXD1 pin.
Note 1: When operations are disabled by setting TXE and RXE bit to “0”, the setting becomes valid when data transmit or receive
complete. When the transmit data is stored in the transmit data buffer, the data are not transmitted. Even if data transmit is
enabled, until new data are written to the transmit data buffer, the current data are not transmitted.
Note 2: The transmit clock and the parity are common to transmit and receive.
Note 3: UARTCR1<RXE> and UARTCR1<TXE> should be set to “0” before UARTCR1<BRG> is changed.
Note: When UARTCR2<RXDNC> = “01”, pulses longer than 96/fc [s] are always regarded as signals; when UARTCR2<RXDNC>
= “10”, longer than 192/fc [s]; and when UARTCR2<RXDNC> = “11”, longer than 384/fc [s].
UART Control Register1
UARTCR1
(001BH)
76
543
210
TXE
RXE
STBT
EVEN
PE
BRG
(Initial value: 0000 0000)
TXE
Transfer operation
0:
1:
Disable
Enable
Write
only
RXE
Receive operation
0:
1:
Disable
Enable
STBT
Transmit stop bit length
0:
1:
1 bit
2 bits
EVEN
Even-numbered parity
0:
1:
Odd-numbered parity
Even-numbered parity
PE
Parity addition
0:
1:
No parity
Parity
BRG
Transmit clock select
000:
001:
010:
011:
100:
101:
110:
111:
fc/13 [Hz]
fc/26
fc/52
fc/104
fc/208
fc/416
TC4 ( Input INTTC4)
fc/96
UART Control Register2
UARTCR2
(001CH)
765
432
1
0
RXDNC
STOPBR
(Initial value: **** *000)
RXDNC
Selection of RXD input noise
rejectio time
00:
01:
10:
11:
No noise rejection (Hysteresis input)
Rejects pulses shorter than 31/fc [s] as noise
Rejects pulses shorter than 63/fc [s] as noise
Rejects pulses shorter than 127/fc [s] as noise
Write
only
STOPBR
Receive stop bit length
0:
1:
1 bit
2 bits



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