TMP88CS43FG datasheet(95/218 Pages) TOSHIBA

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Page 85

TMP88CS43FG

Note 1: fc: Clock [Hz]

Note 2: Make sure the timer/counter is idle (CTC1CR1<CTC1SM, CTC1S> = 00) before setting operation mode, edge, start,

source clock, external trigger timer mode control, and PPG output control.

Note 3: The CTC1DRB and CTC1DRC Registers cannot be accessed for write unless they are set for PPG output mode and

specified with CTC1CR2<CTC1REG>.

Note 4: CTC1CR1<CTC1E> is effective only when using an external clock as trigger (CTC1CR1<CTC1SM>).

Note 5: Data must be written to as many data registers as set with CTC1CR2<CTC1REG>.

Note 6: To write data to CTC1DRA/B/C, use the LDW instruction, or use the LD instruction writing in order of L, H.

Note 7: Data register values must be written to the respective registers before starting. To modify the values after starting, write

the new data within an interval from an INTCTC1 interrupt to the next INTCTC1.

Note 8: Specifying CTC1CR1<CTC1RES> = 1 causes all conditions to be reset. Even when the CTC circuit is operating, they are

reset, and the PPG output becomes “0”. However, only the INTCTC1 signal is not reset if the signal is being generated.

Note 9: For event counter mode (when CTC pin input is selected in timer mode), the active edge of the external trigger to count

can be selected with CTC1CR1<CTC1SE>.

Note 10:Disabling external trigger input with CTC1CR2<EXTRGDIS> creates the 0 input state.

Note 11:To stop the counter by software at trigger start, set CTC1CR2<CTC1SM, CTC1S> = 00.

Setting-up the CTC1CR1 Register

CTC1S

Control start

0: Stop and clear counter

1: Command start

Timer

Event

PPG

R/W

οοο

CTC1SM

Select start

0: Software start

1: External trigger start

οοο

ο×ο

CTC1E

Select external trigger edge

0: Enable one edge

1: Enable both edges

οοο

ο×ο

CTC1SE

Select external trigger start

edge

0: Rising edge

1: Falling edge

οοο

CTC1CY

Select cycle

0: Successive

1: One shot

οοο

ο×ο

CTC1M

Set operation mode

0: Timer/Event counter modes

1: PPG (programmable pulse generator) output mode

PPGFF0

Select PPG output

0: Forward output immediately after start

1: Reverse output immediately after start

CTC1RES

Reset all

0: Normal operation

1: CTC1 reset

Setting-up the CTC1CR2 Register

CTC1FF0

Control timer output F/F0

0: Clear

1: Set

R/W

CTC1CK

Select timer/counter clock

source

Unit: Hz

NORMAL and IDLE Modes

DV1CK = 0

DV1CK = 1

000

fc/211

fc/212

001

fc/27

fc/28

010

fc/25

fc/26

011

fc/23

fc/24

100

fc/22

fc/23

101

fc/2

fc/22

110

111

External clock input (CTC1 pin input)

CTC1REG

Set registers used by timer/

counter

00: CTC1DRA

01: CTC1DRA + CTC1DRB

10: CTC1DRA + CTC1DRB + CTC1DRC

11: Reserved

1REG

2REG

3REG

EXTRGDIS

External trigger input

0: Enable external trigger input

1: Disable external trigger input

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