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UPSD3422 bảng dữ liệu(PDF) 119 Page - STMicroelectronics

tên linh kiện UPSD3422
Giải thích chi tiết về linh kiện  Turbo Plus Series Fast Turbo 8032 MCU with USB and Programmable Logic
PDF  293 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
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UPSD3422 bảng dữ liệu(HTML) 119 Page - STMicroelectronics

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I2C interface
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23.6
General call address
A General Call (GC) occurs when a Master-Transmitter initiates a transfer containing a
Slave address of 0000000b, and the R/W bit is logic 0. All Slave devices capable of
responding to this broadcast message will acknowledge the GC simultaneously and then
behave as a Slave-Receiver. The next byte transmitted by the Master will be accepted and
acknowledged by all Slaves capable of handling the special data bytes. A Slave that cannot
handle one of these data bytes must ignore it by not acknowledging it. The I2C specification
lists the possible meanings of the special bytes that follow the first GC address byte, and the
actions to be taken by the Slave device(s) upon receiving them. A common use of the GC by
a Master is to dynamically assign device addresses to Slave devices on the bus capable of a
programmable device address.
The uPSD34xx can generate a GC as a Master-Transmitter, and it can receive a GC as a
Slave. When receiving a GC address (00h), an interrupt will be generated so firmware may
respond to the special GC data bytes if desired.
23.7
Serial I/O engine (SIOE)
At the heart of the I2C interface is the hardware SIOE, shown in Figure 43. The SIOE
automatically handles low-level I2C bus protocol (data shifting, handshaking, arbitration,
clock generation and synchronization) and it is controlled and monitored by five SFRs.
The five SFRs shown in Figure 43 are:
●
S1CON - Interface Control (Table 54 on page 121)
●
S1STA - Interface Status (Table 56 on page 123)
●
S1DAT - Data Shift Register (Table 57 on page 124)
●
S1ADR - Device Address (Table 58 on page 124)
●
S1SETUP - Sampling Rate (Table 59 on page 125)



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