TMPR3911 datasheet(62/462 Pages) TOSHIBA

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Chapter 2 Pin Descriptions

2-8

2.2.6

Magicbus Pins

MBUSCLK:

INPUT/OUTPUT

This pin is the bi-directional Magicbus clock signal. MBUSCLK is an input signal whenever the

TMPR3911/12 is in the slave mode and is an output signal whenever the TMPR3911/12 is in the

master mode.

MBUSDATA:

INPUT/OUTPUT

This pin is the bi-directional Magicbus data signal. MBUSDATA is an input signal whenever the

TMPR3911/12 is in the slave mode and is an output signal whenever the TMPR3911/12 is in the

master mode.

MBUSINT:

INPUT

This pin is the Magicbus interrupt signal. This signal is used to interrupt the TMPR3911/12

whenever a peripheral has been attached to or detached from the bus, or whenever a peripheral has

initiated an interrupt event.

2.2.7

Reset Pins

CPURES*:

INPUT

This pin is used to reset the Processor core. This pin should be connected to a switch for

initiating a reset in the event that a software problem might hang the Processor core. The pin

should also be pulled up to VSTANDBY (external signal) through an external pull-up resistor.

PON*:

INPUT

This pin serves as the Power On Reset signal for the TMPR3911/12. This signal must remain

low when VSTANDBY (external signal) is asserted until VSTANDBY is stable. Once

VSTANDBY is asserted, this signal should never go low unless all power is lost in the system.

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