LPC2364 datasheet(40/47 Pages) NXP

40 / 47 page

LPC2364_66_68_2

Preliminary data sheet

Rev. 02 — 1 October 2007

40 of 47

NXP Semiconductors

LPC2364/66/68

Fast communication chip

10. Dynamic characteristics

[1]

Characterized but not implemented as production test. Guaranteed by design.

[1]

Parameters are valid over operating temperature range unless otherwise speciﬁed.

[2]

Typical ratings are not guaranteed. The values listed are at room temperature (25

°C), nominal supply voltages.

[3]

Bus capacitance Cb in pF, from 10 pF to 400 pF.

Table 7.

Dynamic characteristics of USB pins (full-speed)

CL = 50 pF; Rpu = 1.5 kΩ on D+ to VDD(3V3), unless otherwise speciﬁed.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

rise time

10 % to 90 %

8.5

13.8

fall time

10 % to 90 %

7.7

13.7

tFRFM

differential rise and fall time

matching

tr /tf

109

VCRS

output signal crossover voltage

1.3

2.0

tFEOPT

source SE0 interval of EOP

see Figure 7

160

175

tFDEOP

source jitter for differential transition

to SE0 transition

see Figure 7

−2

tJR1

receiver jitter to next transition

−18.5

+18.5

tJR2

receiver jitter for paired transitions

10 % to 90 %

−9

tEOPR1

EOP width at receiver

must reject as

EOP; see

Figure 7

[1] 40

--ns

tEOPR2

EOP width at receiver

must accept as

EOP; see

Figure 7

[1] 82

--ns

Table 8.

Dynamic characteristics

Tamb = −40 °C to +85 °C for commercial applications; VDD(3V3) over speciﬁed ranges.[1]

Symbol

Parameter

Conditions

Min

Typ[2]

Max

Unit

External clock

fosc

oscillator frequency

MHz

Tcy(clk)

clock cycle time

100

tCHCX

clock HIGH time

Tcy(clk) × 0.4

tCLCX

clock LOW time

Tcy(clk) × 0.4

tCLCH

clock rise time

tCHCL

clock fall time

I2C-bus pins (P0[27] and P0[28])

tf(o)

output fall time

VIH to VIL

20 + 0.1

× Cb[3]

--ns

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