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TLC976CDGG bảng dữ liệu(PDF) 13 Page - Texas Instruments

tên linh kiện TLC976CDGG
Giải thích chi tiết về linh kiện  10-BIT, 20 MSPS, AREA CCD SIGNAL PROCESSOR
PDF  17 Pages
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TLC976CDGG bảng dữ liệu(HTML) 13 Page - Texas Instruments

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TLC976C
10-BIT, 20 MSPS, AREA CCD SIGNAL PROCESSOR
SLAS193 – OCTOBER 1998
13
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
ADC internal calibration
start-up calibration at power up
After power is turned on, the start-up calibration starts under the following conditions:
1.
The voltage between VRT and VRB is over 1 V when the voltage between AVDD and AVSS is over 2.5 V.
2.
The voltage between DVDD and DVSS is over 2.5 V.
3.
The RESET terminal (pin 26) is high.
4.
The AD-STBY terminal (pin 31) is low.
The calibration sequence starts after condition 2 is met (see Figure 7). The following equation calculates the
time required for the start-up calibration after the above conditions are met.
Start-up calibration time = main clock pulse period
× 16 × 16384
For example, if the main clock frequency is 15 MHz, the time required for startup calibration is 17.5 ms.
5 V
2.5 V
1 V
Reset = HIGH, AD-STBY = LOW
AVDD
VRT
DVDD
VRB
CALIBRATION START
Figure 7. Start-Up Calibration



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