MPC8280 datasheet(856/1386 Pages) FREESCALE

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Serial Management Controllers (SMCs)

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

28-2

Freescale Semiconductor

The receive data source can be L1RXD if the SMC is connected to a TDM channel of an SIx, or SMRXD

if it is connected to the NMSI. The transmit data source can be L1TXD if the SMC is connected to a TDM

or SMTXD if it is connected to the NMSI.

If the SMC is connected to a TDM, the SMC receive and transmit clocks can be independent from each

other, as defined in Chapter 15, “Serial Interface with Time-Slot Assigner.” However, if the SMC is

connected to the NMSI, receive and transmit clocks must be connected to a single clock source (SMCLK),

an internal signal name for a clock generated from the bank of clocks. SMCLK originates from an external

signal or one of the four internal baud rate generators.

An SMC connected to a TDM derives a synchronization pulse from the TSA. An SMC connected to the

NMSI using transparent protocol can use SMSYN for synchronization to determine when to start a

transfer. SMSYN is not used when the SMC is in UART mode.

28.1

Features

The following is a list of the SMC’s main features:

•

Each SMC can implement the UART protocol on its own signals

•

Each SMC can implement a totally transparent protocol on a multiplexed or nonmultiplexed line.

This mode can also be used for a fast connection between MPC8280s.

•

Each SMC channel fully supports the C/I and monitor channels of the GCI (IOM-2) in ISDN

applications

•

Two SMCs support the two sets of C/I and monitor channels in the SCIT channels 0 and 1

•

Full-duplex operation

•

Local loopback and echo capability for testing

28.2

Common SMC Settings and Configurations

The following sections describe settings and configurations that are common to the SMCs.

28.2.1

SMC Mode Registers (SMCMR1/SMCMR2)

The SMC mode registers (SMCMR1 and SMCMR2), shown in Figure 28-2, selects the SMC mode as well

as mode-specific parameters. The functions of SMCMR[8–15] are the same for each protocol. Bits 0–7

vary according to protocol selected by the SM bits.

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