MPC8280 datasheet(724/1386 Pages) FREESCALE

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SCC UART Mode

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

21-18

Freescale Semiconductor

Section 20.2, “SCC Buffer Descriptors (BDs),” describes the data length and buffer pointer fields.

21.18 SCC UART Transmit Buffer Descriptor (TxBD)

The CPM uses BDs to confirm transmission and indicate error conditions so the core knows that buffers

have been serviced. Figure 21-9 shows the SCC UART TxBD.

Table 21-11 describes TxBD status and control fields.

—

Reserved, should be cleared.

Break received. Set when a break sequence is received as data is being received into this buffer.

Framing error. Set when a character with a framing error (a character without a stop bit) is received

and located in the last byte of this buffer. A new Rx buffer is used to receive subsequent data.

Parity error. Set when a character with a parity error is received and located in the last byte of this

buffer. A new Rx buffer is used to receive subsequent data.

—

Reserved, should be cleared.

Overrun. Set when a receiver overrun occurs during reception.

Carrier detect lost. Set when the carrier detect signal is negated during reception.

0123

456

789

Offset + 0

—

—CT

Offset + 2

Data Length

Offset + 4

Tx Buffer Pointer

Offset + 6

Figure 21-9. SCC UART Transmit Buffer Descriptor (TxBD)

Table 21-11. SCC UART TxBD Status and Control Field Descriptions

Bit

Name

Description

Ready.

0 The buffer is not ready. This BD and buffer can be modified. The CPM automatically clears R after

the buffer is sent or an error occurs.

1 The user-prepared buffer is waiting to begin transmission or is being transmitted. Do not modify

the BD once R is set.

—

Reserved, should be cleared.

Wrap (last buffer descriptor in TxBD table).

0 Not the last BD in the table.

1 Last BD in the table. After this buffer is used, the CPM sends data using the BD pointed to by

TBASE. The number of TxBDs in this table is determined only by the W bit and space constraints

of the dual-port RAM.

Table 21-10. SCC UART RxBD Status and Control Field Descriptions (continued)

Bits

Name

Description

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