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MPC8280 bảng dữ liệu(PDF) 632 Page - Freescale Semiconductor, Inc |
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MPC8280 bảng dữ liệu(HTML) 632 Page - Freescale Semiconductor, Inc |
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632 / 1386 page ![]() CPM Multiplexing MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 16-20 Freescale Semiconductor 2–3 SMC1CS SMC1 clock source (NMSI mode). SMC1 can take its clocks from one of the two BRGs or one of two pins from the bank of clocks. However, the SMC1 transmit and receive clocks must be the same when it is connected to the NMSI. 00 SMC1 transmit and receive clocks are BRG1. 01 SMC1 transmit and receive clocks are BRG7. 10 SMC1 transmit and receive clocks are CLK7. 11 SMC1 transmit and receive clocks are CLK9. 4 SMC2 SMC2 connection 0 SMC2 is not connected to the TSA and is either connected directly to the NMSIx pins or is not used. The choice of general-purpose I/O port pins versus SMCn pins is made in the parallel I/O control register. 1 SMC2 is connected to the TSA of the SIs. The NMSIx pins are available for other purposes. 5 — Reserved, should be cleared 6–7 SMC2CS SMC2 clock source (NMSI mode). SMC2 can take its clocks from one of the eight BRGs or one of eight pins from the bank of clocks. However, the SMC2 transmit and receive clocks must be the same when it is connected to the NMSI. 00 SMC2 transmit and receive clocks are BRG2. 01 SMC2 transmit and receive clocks are BRG8. 10 SMC2 transmit and receive clocks are CLK19. 11 SMC2 transmit and receive clocks are CLK20. Table 16-7. CMXSMR Field Descriptions (continued) Bits Name Description |
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