XIO2000A datasheet(28/155 Pages) TI

28 / 155 page

Introduction

April 2007

SCPS155B

Table 2−11. Miscellaneous Terminals

SIGNAL

GZZ/

ZZZ

BALL

ZHH

BALL

I/O

TYPE

CELL

TYPE

CLAMP

RAIL

EXTERNAL

PARTS

DESCRIPTION

CLKRUN_EN

B15

B13

CMOS

VDD_33

Optional

pullup

resistor

Clock run enable

0 = Clock run support disabled

1 = Clock run support enabled

Note: The CLKRUN_EN input buffer has an internal active

pulldown.

EXT_ARB_EN

A15

B12

CMOS

VDD_33

Optional

pullup

resistor

External arbiter enable

0 = Internal arbiter enabled

1 = External arbiter enabled

Note: The EXT_ARB_EN input buffer has an internal active

pulldown.

GPIO0 //

CLKRUN

T05

P03

I/O

CMOS

VDD_33

Optional

pullup

resistor

General-purpose I/O 0/clock run. This terminal functions as a

GPIO controlled by bit 0 (GPIO0_DIR) in the GPIO control

terminal is used as clock run input when the bridge is placed

in clock run mode.

Note: In clock run mode, an external pullup resistor is

required to prevent the CLKRUN signal from floating.

Note: This terminal has an internal active pullup resistor.

GPIO1 //

PWR_OVRD

U05

P04

I/O

CMOS

VDD_33

−

General-purpose I/O 1/power override. This terminal functions

as a GPIO controlled by bit 1 (GPIO1_DIR) in the GPIO

control register (see Section 4.59) or the power override

output terminal. GPIO1 becomes PWR_OVRD when bits

22:20 (POWER_OVRD) in the general control register are set

to 001b or 011b (see Section 4.65).

Note: This terminal has an internal active pullup resistor.

GPIO2

T06

N04

I/O

CMOS

VDD_33

−

General-purpose I/O 2. This terminal functions as a GPIO

controlled by bit 2 (GPIO2_DIR) in the GPIO control register

(see Section 4.59).

Note: When PERST is deasserted, this terminal must be a 1b

to enable the PCI Express 1.0a compatibility mode.

Note: This terminal has an internal active pullup resistor.

GPIO3

U06

M04

I/O

CMOS

VDD_33

−

General-purpose I/O 3. This terminal functions as a GPIO

controlled by bit 3 (GPIO3_DIR) in the GPIO control register

(see Section 4.59).

Note: This terminal has an internal active pullup resistor.

GPIO4 // SCL

R07

P05

I/O

CMOS

VDD_33

Optional

pullup

resistor

GPIO4 or serial-bus clock. This terminal functions as

serial-bus clock if a pullup resistor is detected on SDA. If a

pulldown resistor is detected on SDA, this terminal functions

as GPIO4.

Note: In serial-bus mode, an external pullup resistor is

required to prevent the SCL signal from floating.

Note: This terminal has an internal active pullup resistor.

GPIO5 // SDA

T07

N05

I/O

CMOS

VDD_33

Pullup or

Pulldown

resistor

GPIO5 or serial-bus data. This terminal functions as

serial-bus data if a pullup resistor is detected on SDA. If a

pulldown resistor is detected on SDA, this terminal functions

as GPIO5.

Note: In serial-bus mode, an external pullup resistor is

required to prevent the SDA signal from floating.

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