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ST72324BJ2 bảng dữ liệu(PDF) 160 Page - STMicroelectronics |
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ST72324BJ2 bảng dữ liệu(HTML) 160 Page - STMicroelectronics |
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160 / 188 page ![]() Electrical characteristics ST72324B 160/188 12.10.2 ICCSEL/VPP pin Subject to general operating conditions for VDD, fCPU, and TA unless otherwise specified. Figure 80. Two typical applications with ICCSEL/VPP pin (1) 1. When ICC mode is not required by the application ICCSEL/VPP pin must be tied to VSS. 12.11 Timer peripheral characteristics Subject to general operating conditions for VDD, fOSC, and TA unless otherwise specified. Refer to I/O port characteristics for more details on the input/output alternate function characteristics (output compare, input capture, external clock, PWM output...). Data based on design simulation and/or characterization results, not tested in production. 12.11.1 16-bit timer Table 108. ICCSEL/VPP pin Symbol Parameter Conditions Min Max Unit VIL Input low level voltage(1) 1. Data based on design simulation and/or technology characteristics, not tested in production. Flash versions VSS 0.2 V ROM versions VSS 0.3 x VDD VIH Input high level voltage(1) Flash versions VDD - 0.1 12.6 ROM versions 0.7 x VDD VDD Ilkg Input leakage current VIN = VSS ±1 µA ICCSEL/VPP ST72XXX 10k Ω Programming tool VPP ST72XXX Table 109. 16-bit timer Symbol Parameter Conditions Min Typ Max Unit tw(ICAP)in Input capture pulse time 1 tCPU tres(PWM) PWM resolution time 2tCPU fCPU = 8 MHz 250 ns fEXT Timer external clock frequency 0fCPU/4 MHz fPWM PWM repetition rate ResPWM PWM resolution 16 bit |
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