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ST72324BJ2 bảng dữ liệu(PDF) 92 Page - STMicroelectronics

tên linh kiện ST72324BJ2
Giải thích chi tiết về linh kiện  8-bit MCU, 3.8 to 5.5 V operating range with 8 to 32 Kbyte Flash/ROM, 10-bit ADC, 4 timers, SPI, SCI
PDF  188 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
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ST72324BJ2 bảng dữ liệu(HTML) 92 Page - STMicroelectronics

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On-chip peripherals
ST72324B
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10.4.3
General description
Figure 50 shows the serial peripheral interface (SPI) block diagram. The SPI has three
registers:
–
SPI Control Register (SPICR)
–
SPI Control/Status Register (SPICSR)
–
SPI Data Register (SPIDR)
The SPI is connected to external devices through four pins:
–
MISO: Master In / Slave Out data
–
MOSI: Master Out / Slave In data
–
SCK: Serial Clock out by SPI masters and input by SPI slaves
–SS: Slave select: This input signal acts as a ‘chip select’ to let the SPI master
communicate with slaves individually and to avoid contention on the data lines.
Slave SS inputs can be driven by standard I/O ports on the master MCU.
Figure 50.
Serial peripheral interface block diagram
Functional description
A basic example of interconnections between a single master and a single slave is
illustrated in Figure 51.
The MOSI pins are connected together and the MISO pins are connected together. In this
way data is transferred serially between master and slave (most significant bit first).
SPIDR
Read Buffer
8-bit Shift Register
Write
Read
Data/Address bus
SPI
SPIE
SPE
MSTR
CPHA
SPR0
SPR1
CPOL
Serial clock
generator
MOSI
MISO
SS
SCK
control
state
SPICR
SPICSR
Interrupt
request
Master
control
SPR2
0
7
0
7
SPIF WCOL
MODF
0
OVR
SSI
SSM
SOD
SOD
bit
SS
1
0



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