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ST72324BJ2 bảng dữ liệu(PDF) 159 Page - STMicroelectronics

tên linh kiện ST72324BJ2
Giải thích chi tiết về linh kiện  8-bit MCU, 3.8 to 5.5 V operating range with 8 to 32 Kbyte Flash/ROM, 10-bit ADC, 4 timers, SPI, SCI
PDF  188 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
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ST72324BJ2 bảng dữ liệu(HTML) 159 Page - STMicroelectronics

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ST72324B
Electrical characteristics
159/188
RESET pin protection when LVD is disabled
When the LVD is disabled, it is recommended to protect the RESET pin as shown in
Figure 79 and follow these guidelines:
1.
The reset network protects the device against parasitic resets.
2.
The output of the external reset circuit must have an open-drain output to drive the ST7
reset pad. Otherwise the device can be damaged when the ST7 generates an internal
reset (LVD or watchdog).
3.
Whatever the reset source is (internal or external), the user must ensure that the level
on the RESET pin can go below the VIL max. level specified in Section 12.10.1.
Otherwise the reset will not be taken into account internally.
4.
Because the reset circuit is designed to allow the internal RESET to be output in the
RESET pin, the user must ensure that the current sunk on the RESET pin (by an
external pull-up for example) is less than the absolute maximum value specified for
IINJ(RESET) in Section 12.2.2 on page 138.
Figure 79.
RESET pin protection when LVD is disabled
0.01µF
external
reset
circuit
User
Required
ST72XXX
Pulse
generator
Filter
RON
VDD
Watchdog
Internal
reset
VDD
4.7k
Ω



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