ST72324BJ2 datasheet(154/188 Pages) STMICROELECTRONICS

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Electrical characteristics

ST72324B

154/188

Figure 70.

Unused I/O pins configured as input(1)

I/O can be left unconnected if it is configured as output (0 or 1) by the software. This has the advantage of

greater EMC robustness and lower cost.

Figure 71.

Typical IPU vs. VDD with VIN = VSS

12.9.2

Output driving current

Subject to general operating conditions for VDD, fCPU, and TA unless otherwise specified.

10k

Ω

Unused I/O port

ST7XXX

10k

Ω

Unused I/O port

ST7XXX

VDD

22 .5

33 .5

4 .5

55 .5

Vd d (V )

T a = 1 40° C

Ta = 9 5 ° C

Ta = 2 5 ° C

Ta = -4 5 ° C

Table 106.

Output driving current

Symbol

Parameter

Conditions

Min

Max

Unit

VOL

(1)

Output low level voltage for a standard I/O pin when

8 pins are sunk at same time

(see Figure 72)

VDD =5V

IIO = +5mA

1.2

IIO = +2mA

0.5

Output low level voltage for a high sink I/O pin when

4 pins are sunk at same time

(see Figure 73 and Figure 75)

IIO = +20mA

TA < 85°

TA >85°C

1.3

1.5

IIO = +8mA

0.6

VOH

(2)

Output high level voltage for an I/O pin when 4 pins

are sourced at same time

(see Figure 74 and Figure 77)

IIO = -5mA,

TA < 85°C

TA >85°C

VDD -1.4

VDD -1.6

IIO = -2mA

VDD -0.7

The IIO current sunk must always respect the absolute maximum rating specified in Section 12.2.2 and the sum of IIO (I/O

ports and control pins) must not exceed IVSS.

The IIO current sourced must always respect the absolute maximum rating specified in Section 12.2.2 and the sum of IIO

(I/O ports and control pins) must not exceed IVDD. True open drain I/O pins do not have VOH.

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