WDI

ttWDt

ttDt

Ignore

ttWDt

ttWDt

ttWDt

ttSDt

tP-WD

WDO

Devices with only RESET output, the RESET output will be

asserted when watchdog error occurs.

Figure 7-6. Timeout Watchdog Timer Operation

7.3.2.1 tWD Timer

The tWD timer for TPS35-Q1 can be set using an external capacitor connected between CWD pin and GND

pin. This feature is available with pinout options A or B. Applications which are space constrained or need timer

values which meet offered timer options, can benefit when using pinout options C or D. The TPS35-Q1 offers

multiple fixed timer options ranging from 1ms up-to 100s.

The TPS35-Q1, when using capacitance based timer, senses the capacitance value during the power up or

after a RESET event. The capacitor is charged and discharged with known internal current source for one cycle

to sense the capacitance value. The sensed value is used to arrive at tWD timer for the watchdog operation.

This unique implementation helps reduce the continuous charge and discharge current for the capacitor, thus

reducing overall current consumption. Continuous charge and discharge of capacitance creates wider dead time

(no watchdog monitor functionality) when capacitor is discharging. The dead time is higher for high value of

capacitance. The unique implementation of TPS35-Q1 helps avoid the dead time as the capacitance is not

continuously charging or discharging under normal operation. Make sure CCWD is < 200 x CCRST for accurate

calibration of capacitance. Equation 1 highlights the relationship between tWD in second and CWD capacitance

in farad. The tWD timer is 20% accurate for an ideal capacitor. Accuracy of the capacitance has additional impact

on the tWD time. Make sure the capacitance meets the recommended operating range. Capacitance outside the

recommended range can lead to incorrect operation of the device.

tWD (sec) = 4.95 x 106 x CCWD (F)

(1)

The TPS35-Q1 also offers wide selection of high accuracy fixed timer options starting from 1ms to 100sec

including various industry standard values. The TPS35-Q1 fixed time options are ±10% accurate for tWD ≥ 10ms.

For tWD < 10ms, the accuracy is ±20%. tWD value relevant to application can be identified from the orderable part

number. Refer Section 4 section to identify mapping of orderable part number to tWD value.

The TPS35-Q1 offers flexibility to change the tWD value on the fly by controlling the logic levels on the SETx

pins. Section 7.3.2.4 section explains the advantages offered by this feature and the device behavior with

various SETx pin combinations.

7.3.2.2 Watchdog Enable Disable Operation

The TPS35-Q1 supports watchdog enable or disable functionality. This functionality is critical for different use

cases as listed below.

• Disable watchdog during firmware update to avoid host RESET.

• Disable watchdog during software step-by-step debug operation.

• Disable watchdog when performing critical task to avoid watchdog error interrupt.

• Keep watchdog disabled until host boots up.

www.ti.com

TPS35-Q1

SLVSGE8B – NOVEMBER 2022 – REVISED AUGUST 2024

Copyright © 2024 Texas Instruments Incorporated

Submit Document Feedback

19

Product Folder Links: TPS35-Q1