RC9624DP datasheet(22/34 Pages) ETC2

22 / 34 page

3.0 Software Interface

RC96V24DP

3.3 Interface Memory Bit Functions

Single Device Data/Modem Data Pump

3-2

D96V24DSA

Table 3-1. Interface Memory Map

Function

Address

(Hex)

Bit

Interrupt Handling

NSIA

NCIA

–

NSIE

NEWS

NCIE

–

NEWC

TDBIA

RDBIA

TDBIE

–

TDBE

RDBIE

–

RDBF

RAM Access,

Control and Status

XACC

–

IOX

XCRD

XWT

XCR

X RAM ADDRESS (XADD)

YACC

–

YCRD

YWT

YCR

Y RAM ADDRESS (YADD)

X RAM DATA MSB (XDAM)

X RAM DATA LSB (XDAL)

Y RAM DATA MSB (YDAM)

Y RAM DATA LSB (YDAL)

–

–––

––

–

–––

––

–

Control

TLVL

VOL

TXCLK

CONFIGURATION (CONF)

Transmit Data

Buffer

–––

––

TXP

TRANSMIT DATA BUFFER (TBUFFER)

Status

RLSD

FED

CTS

DSR

SYNCD

FLAGS

RTDET

BRKD

SPEED

–

PNDET

S1DET

SCR1

U1DET

SADET

–

EDET

–

DTDIG

TONEA

TONEB

TONEC

ATV25

ATBELL

PNSUC

DTDET

BEL103

–––

––

CRCS

Control

NV25

DTMF

ORG

DATA

–

SLEEP

ASYNC

TPDM

–

DDIS

TRFZ

–

RTRN

RTS

RDLE

RDL

L2ACT

–

L3ACT

ABORT

BRKS

EXOS

PARSL

PEN

STB

WDSZ

–

TXSQ

CEQE

RCEQ

TXVOC

–

EQRES

SWRES

–

EQFZ

IFIX

AGCFZ

CRFZ

NRZIE

HDLC

SPLIT

–

ARC

SDIS

GTE

–

–––

––

–

Receive Data Buffer

–––

––

RXP

RECEIVE DATA BUFFER (RBUFFER)

Note:

‘ – ’ in the BIT columns indicates reserved for modem use only.

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