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AVR16EB32 bảng dữ liệu(PDF) 34 Page - Microchip Technology |
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AVR16EB32 bảng dữ liệu(HTML) 34 Page - Microchip Technology |
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34 / 46 page ![]() Figure 6-2. AVR16EB32 Curiosity Nano Debugger Schematic rotatethispage90 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 D D C C B B A A AVR16EB32 Curiosity Nano AVR16EB32_Curiosity_Nano_Debugger.SchDoc Project Title File: Designed with PCB Layout Contact: HM Sheet Title Debugger Project Owner: PDB Size A3 EV73J36A PartNumber: Variant: Default Assembly 3 of 4 2023-10-18 SCH #: Date: Sheet 02-00618 2 PCB #: 04-11710 Rev: Rev: 2 Altium.com Interface SWD ICSP UPDI TARGET TARGET TARGET ADJUSTABLE REGULATOR TARGET Signal UART RX UART RX CDC TX UART RX VCC_REGULATOR VCC_LEVEL VCC_EDGE VCC_VBUS EN 1 VIN 3 VOUT 4 ADJ 5 GND 2 BYP 6 EP 7 MIC5353YMT-TR U200 VOUT A1 VIN A2 VOUT B1 VIN B2 GND C1 EN C2 MIC94163YCS U201 UART TX CDC RX UART TX UART TX J200 47k R200 REG_ENABLE DAT UPDI SWDAT DBG0 GND GPIO CLK SWCLK DBG1 J201 GND 0.1uF C201 2.2uF C200 GPIO VCC_TARGET SWO/GPIO GPIO DBG2 GND RESET GND RESET MCLR GND DBG3 GND - VCC - - GND GND GND 47k R205 ID PIN VTG_ADC DAC 33k R208 VTG_EN 1k R218 VCC_P3V3 REG_ENABLE ID_SYS ID_SYS VBUS_ADC DEBUGGER POWER/STATUS LED DEBUGGER TP200 TP201 STATUS_LED SML-P12MTT86R D200 1k R215 VCC_P3V3 GND DEBUGGER TESTPOINT VCC_MCU_CORE GND 1uF C209 GND GND TCK 1 GND 2 TDO 3 VTref 4 TMS 5 SRST 6 TESTPOINT ARRAY 2x3 JTAG J202 VCC_P3V3 SWCLK VCC_P3V3 SWDIO SRST 0.1uF C207 SWCLK GND SWDIO PAD 33 PA00 1 PA01 2 PA02 3 PA03 4 PA04 5 PA05 6 PA06 7 PA07 8 PA16 17 PA17 18 PA18 19 PA19 20 PA22 21 USB_SOF/PA23 22 USB_DM/PA24 23 USB_DP/PA25 24 ATSAMD21E18 U206 VCC_LEVEL DIR 5 A 3 B 4 GND 2 VCCA 1 VCCB 6 74LVC1T45FW4-7 U209 VCC_P3V3 GND CDC_TX_CTRL CDC_TX CDC_TX USBD_P S1_0_TX USBD_N S1_1_RX VCC_LEVEL DIR 5 A 3 B 4 GND 2 VCCA 1 VCCB 6 74LVC1T45FW4-7 U208 VCC_P3V3 ID_SYS DAC GND VTG_ADC CDC_TX_CTRL CDC_RX_CTRL S0_0_RX VOFF CDC_RX CDC_RX CDC_RX_CTRL RESERVED VTG_EN S0_2_TX 1k R212 S0_3_CLK DBG3_CTRL VCC_LEVEL DIR 5 A 3 B 4 GND 2 VCCA 1 VCCB 6 74LVC1T45FW4-7 U207 VCC_P3V3 GND DBG0_CTRL DBG0 DBG0 GND VCC_LEVEL DIR 5 A 3 B 4 GND 2 VCCA 1 VCCB 6 74LVC1T45FW4-7 U205 VCC_P3V3 VCC_P3V3 GND 0.1uF C202 DBG1_CTRL GND DBG1 DBG1 VCC_LEVEL DIR 5 A 3 B 4 GND 2 VCCA 1 VCCB 6 74LVC1T45FW4-7 U204 VCC_P3V3 GND DBG2_CTRL DBG2 DBG2 VOFF DEBUGGER REGULATOR DBG3 OPEN DRAIN DBG3 DBG3 VOUT 1 VOUT 2 EN 4 NC 5 VIN 6 MIC5528-3.3YMT-TR U203 VCC_P3V3 1k R209 3 1 2 DMN65D8LFB-7B Q200 DBG3_CTRL GND 2.2uF C203 47k R210 GND GND DEBUGGER USB-C CONNECTOR USBD_P USBD_N VBUS VOFF VBUS SLEW RATE- & CURRENT-LIMIT EN 4 VIN 6 GND CSLEW 2 VOUT 1 EP ILIMIT 3 MIC2008 U202 VCC_VBUS CSD25501F3 Q201 0.1uF C208 4.7uF C205 2.2uF C204 GND GND GND GND GND GND GND A1/B12 VBUS A4/B9 CC1 A5 DP1 A6 DN1 A7 SBU1 A8 GND B1/A12 VBUS B4/A9 CC2 B5 DP2 B6 DN2 B7 SBU2 B8 SHIELD 1 SHIELD 2 SHIELD 3 SHIELD 4 L-KLS1-5409-R J203 GND GND GND VBUS_DELAYED VBUS_DELAYED GND VBUS START-UP DELAY GND CNANO Template Revision: 2.3 J200: - Cut-strap used for full separation of target power from the level shifters and on-board regulators. - For current measurements using an external power supply, this strap could be cut for more accurate measurements. Leakage back through the switch is in the micro ampere range. J201: - For current measurements using the on-board power supply, this strap must be cut and an ammeter connected across. MIC5353: Vin: 2.6V to 6V Vout: 1.25V to 5.1V Imax: 500mA Dropout (typical): 50mV@150mA, 160mV @ 500mA Accuracy: 2% initial Thermal shutdown and current limit Maximum output voltage is limited by the input voltage and the dropout voltage in the regulator. TP200 and TP201 are MTG Holes in the corners of the PCB in the DEBUGGER section labelled "GND" on the silkscreen. ADJUSTABLE OUTPUT AND LIMITATIONS: - The DEBUGGER can adjust the output voltage of the regulator between 1.25V and 5.1V to the target. - The voltage output is limited by the input (USB), which can vary between 4.40V to 5.25V - The level shifters have a minimal voltage level of 1.65V and will limit the minimum operating voltage allowed for the target to still allow communication. - The MIC94163 has a minimal volatege level of 1.70V and will limit the minimum voltage delivered to the target. - Firmware configuration will limit the voltage range to be within the the target specification. Programming connector for factory programming of Debugger. SLEW RATE LIMIT: - With C206 set to 2200pF, the slew rate of VCC_VBUS is limited to 2 V/ms by the power switch MIC2008. CURRENT LIMIT: - With R211 set to 470ohm, the current through the power switch MIC2008 is limited to 500mA. MIC5528: Vin: 2.5V to 5.5V Vout: Fixed 3.3V Imax: 500mA Dropout: 260mV @ 500mA R210 is required to pull the Q200 gate to a defined value when the U206 is not powered START-UP DELAY:: - With C208 set to 0.1uF and R214 set to 47kohm, the P-MOS is delaying the turn-on of VCC_DELAYED by 1ms, compared to VBUS. "POWER" "PS" "GND" |
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