PM8621 datasheet(28/184 Pages) PMC

28 / 184 page

NSE-8G™ Standard Product Data Sheet

Preliminary

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use

Document ID: PMC-2010850, Issue 1

Pad Name

Type

Pin No.

Function

Microprocessor Interface (49 Balls)

CSB

Input

AM30

Chip Select Bar. The active low chip select signal (CSB)

controls microprocessor access to registers in the NSE-

8G device. CSB is set low during NSE-8G

Microprocessor Interface Port register accesses. CSB is

set high to disable microprocessor accesses.

If CSB is not required (i.e. register accesses controlled

using RDB and WRB signals only), CSB should be

connected to an inverted version of the RSTB input.

RDB

Input

AM29

Read Enable Bar. The active low read enable bar signal

(RDB) controls microprocessor read accesses to

registers in the NSE-8G device. RDB is set low and CSB

is also set low during NSE-8G Microprocessor Interface

Port register read accesses. The NSE-8G drives the

D[31:0] bus with the contents of the addressed register

while RDB and CSB are low.

WRB

Input

AN29

Write Enable Bar. The active low write enable bar signal

(WRB) controls microprocessor write accesses to

registers in the NSE-8G device. WRB is set low and CSB

is also set low during NSE-8G Microprocessor Interface

Port register write accesses. The contents of D[31:0] are

clocked into the addressed register on the rising edge of

WRB while CSB is low.

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