| công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
|
ADA4945-1ACPZ-R7 bảng dữ liệu(PDF) 21 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADA4945-1ACPZ-R7 bảng dữ liệu(HTML) 21 Page - Analog Devices |
|
21 / 57 page ![]() Data Sheet ADA4945-1 analog.com Rev. A 21 of 57 ABSOLUTE MAXIMUM RATINGS TA = 25°C unless otherwise specified. Table 10. Absolute Maximum Ratings PARAMETER RATING Supply Voltage 11V VOCM ±VS Differential Input Voltage ±1V Operating Temperature Range −40°C to +125°C Storage Temperature Range −65°C to +150°C Lead Temperature (Soldering, 10 sec) 300°C Junction Temperature 150°C Electrostatic Discharge (ESD) Field Induced Charged Device Model (FICDM) 1250V Electrostatic Discharge (ESD)Human Body Model (HBM) 4000V . Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Thermal Resistance Thermal performance is directly linked to printed circuit board (PCB) design and operating environment. Careful attention to PCB thermal design is required. θJA is the natural convection, junction to ambient, thermal resistance measured in a one cubic foot sealed enclosure. θJC is the junction to case thermal resistance. Table 11. Thermal Resistance Package Type θJA θJC Unit CP-16-22 70 15 °C/W Maximum Power Dissipation The maximum safe power dissipation in the ADA4945-1 package is limited by the associated rise in junction temperature (TJ) on the die. At approximately 150°C, which is the glass transition temperature, the properties of the plastic change. Even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric performance of ADA4945-1. Exceeding a junction temperature of 150°C for an extended period can result in changes in the silicon devices, potentially causing failure. The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the package due to the load drive for all outputs. The quiescent power dissipation is the voltage between the supply pins (±VS) times the quiescent current (Iq). The load current consists of the differential and common-mode currents |
|
Link URL |
| Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không? [ DONATE ] |
Alldatasheet là | Quảng cáo | Liên lạc với chúng tôi | Chính sách bảo mật | Liên kết đến bảng dữ liệu | Trao đổi link | Tìm kiếm theo nhà sản xuất All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |