ADA4945-1ACPZ-R7 datasheet(44/57 Pages) AD

44 / 57 page

Data Sheet

ADA4945-1

analog.com

Rev. A

44 of 57

The common-mode feedback loop drives the output common mode voltage that is sampled at the midpoint of the

output voltage divider to equal the voltage at VOCM. This voltage equalization results in the following relationships:

V+OUT = VOCM +

VOUT,dm

V−OUT = VOCM −

VOUT,dm

Note that the summing junction input voltages of the differential amplifier (+IN and −IN in Figure 99) are set by both

the output voltages and the input voltages.

V+IN = +DIN (

RF + RG

) + V−OUT (

RF + RG

)

V−IN = −DIN (

RF+RG

) + V+OUT (

RF+RG

)

Output Voltage Clamp

In addition to the differential and common-mode signal paths, the ADA4945-1 implements clamping circuits to

protect the input devices of circuits being driven by the ADA4945-1, hereafter assumed to be an ADC, from being

overdriven and potentially damaged. These clamping circuits use both differential and common-mode feedback to

limit the output voltages to a range defined by the voltage applied to two reference pins, +VCLAMP and −VCLAMP. These

high impedance pins are typically connected to potentials that define the allowable input range of the ADC, which

are the ADC reference voltages (+VREF and −VREF) for most ADCs.

As shown in Figure 100, the common-mode clamping circuit senses the output voltage midpoint and applies a

common mode feedback signal to prevent VOUT, cm from exceeding +VCLAMP or going below −VCLAMP.

Figure 100. Common-Mode Clamp Block Diagram

The differential clamping circuit, shown in Figure 101, senses each output (+OUT and −OUT) and applies a differential

feedback signal to prevent either output from exceeding (+VCLAMP + 0.5 V) or going below (−VCLAMP − 0.5 V). The

approximately 500 mV offset voltage is designed to allow the outputs to fully use the input range of the ADC without

any clamp engagement, while providing input protection prior to the turn on of the ADC input protection diodes.

This feature allows the ADA4945-1 to provide a full-scale signal to the ADC without incurring any clamp induced

distortion, thus maximizing signal-to-noise ratio (SNR) and linearity while protecting the ADC inputs.

–OUT

+VCLAMP

UPPER

COMMON-MODE

CLAMP

LOWER

COMMON-MODE

CLAMP

iCLAMP (CM)

–VCLAMP

+OUT

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