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ADBMS2950BCCSZ bảng dữ liệu(PDF) 79 Page - Analog Devices

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ADBMS2950BCCSZ bảng dữ liệu(HTML) 79 Page - Analog Devices

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Data Sheet
ADBMS2950B
Rev. 0 | Page 79 of 97
Figure 62. Dual Series Sense Resistor Shunt, All OCx with Same Gain
Figure 63 shows the same dual series sense element shunt
resistor as Figure 62 but with the OC3 input connected across
both sense resistors. The resistors seen at the (over-) current
channels are:
•
I1, OC1: Rsns1
•
I2, OC2: Rsns2
•
OC3: Rsns1 + Rsns2 + Zcenter
Assuming the two sense resistors are roughly the same (Rsns1 ~
Rsns2), the OC3 input has a factor two current gains compared
to OC1 and OC2. To adjust for this, the OC1 and OC2 channels
can be configured to gain = 2 through setting OC1GC and
OC2GC.
Zcenter being the impedance (R + L) of the center copper
element must be as small as possible not to affect the OC3
channel significantly. Channels I1 and I2 must not be connected
across Rsns1 + Rsns2 as the copper element inside the sense
path severely impact the accuracy of those high precision
inputs.



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