DSPIC33F datasheet(46/80 Pages) MICROCHIP

46 / 80 page

dsPIC33F/PIC24H PROGRAMMING SPECIFICATION

DS70152D-page 46

Preliminary

In addition to code memory protection, a part of Data

RAM can be configured to be accessible only by code

resident in the Boot Segment and/or Secure Segment.

The sizes of these “reserved” sections are user-config-

urable, using the RBS<1:0> and RSS<1:0> bits.

3.6.5

USER UNIT ID

The dsPIC33F/PIC24H devices provide four 8-bit Con-

figuration registers (FUID0 through FUID3) for the user

to store product-specific information, such as unit serial

numbers and other product manufacturing data.

FIGURE 3-5:

CONFIGURATION BIT PROGRAMMING FLOW

3.7

Exiting Enhanced ICSP Mode

Exiting Program/Verify mode is done by removing VIH

from MCLR, as shown in Figure 3-6. The only require-

ment for exit is that an interval P16 should elapse

between the last clock and program signals on PGC

and PGD before removing VIH.

FIGURE 3-6:

EXITING ENHANCED

ICSP™ MODE

Note:

All bits in the FBS, FSS and FGS Configu-

ration registers can only be programmed

to a value of ‘0’. the ERASEB command is

the only way to reprogram code-protect

bits from ON (‘0’) to OFF (‘1’).

Send PROGC

Command

ConfigAddress = 0xF80000

PROGC

response

PASS?

Yes

Failure

Report Error

Start

Finish

Yes

ConfigAddress

0xF80018?

ConfigAddress =

ConfigAddress + 2

MCLR

P16

PGD

PGD = Input

PGC

VDD

VIH

P17

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