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M25PX32-VMP6F bảng dữ liệu(PDF) 26 Page - STMicroelectronics |
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M25PX32-VMP6F bảng dữ liệu(HTML) 26 Page - STMicroelectronics |
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26 / 63 page ![]() Instructions M25PX32 26/63 6.2 Write Disable (WRDI) The Write Disable (WRDI) instruction (Figure 9) resets the Write Enable Latch (WEL) bit. The Write Disable (WRDI) instruction is entered by driving Chip Select (S) Low, sending the instruction code, and then driving Chip Select (S) High. The Write Enable Latch (WEL) bit is reset under the following conditions: ● Power-up ● Write Disable (WRDI) instruction completion ● Write Status Register (WRSR) instruction completion ● Write lo Lock Register (WRLR) instruction completion ● Page Program (PP) instruction completion ● Dual Input Fast Program (DIFP) instruction completion ● Program OTP (POTP) instruction completion ● Subsector Erase (SSE) instruction completion ● Sector Erase (SE) instruction completion ● Bulk Erase (BE) instruction completion Figure 9. Write Disable (WRDI) instruction sequence C DQ0 AI13732 S DQ1 2 1 34567 High Impedance 0 Instruction |
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