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STM8L052R8 bảng dữ liệu(PDF) 92 Page - STMicroelectronics

tên linh kiện STM8L052R8
Giải thích chi tiết về linh kiện  Value Line, 8-bit ultralow power MCU, 64-KB Flash,256-byte data EEPROM, RTC, LCD, timers, USART, I2C, SPI, ADC
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Electrical parameters
STM8L052R8
92/109
Doc ID023337 Rev 2
I2C - Inter IC control interface
Subject to general operating conditions for VDD, fSYSCLK, and TA unless otherwise specified.
The STM8L I2C interface (I2C1) meets the requirements of the Standard I2C communication
protocol described in the following table with the restriction mentioned below:
Refer to I/O port characteristics for more details on the input/output alternate function
characteristics (SDA and SCL).
Note:
For speeds around 200 kHz, the achieved speed can have a
± 5% tolerance.
For other speed ranges, the achieved speed can have a
± 2% tolerance.
The above variations depend on the accuracy of the external components used.
Table 41.
I2C characteristics
Symbol
Parameter
Standard mode I2CFast mode I2C(1)
1.
fSYSCLK must be at least equal to 8 MHz to achieve max fast I
2C speed (400 kHz).
Unit
Min.(2)
2.
Data based on standard I2C protocol requirement, not tested in production.
Max. (2)
Min. (2)
Max. (2)
tw(SCLL)
SCL clock low time
4.7
1.3
μs
tw(SCLH)
SCL clock high time
4.0
0.6
tsu(SDA)
SDA setup time
250
100
ns
th(SDA)
SDA data hold time
0
0
900
tr(SDA)
tr(SCL)
SDA and SCL rise time
1000
300
tf(SDA)
tf(SCL)
SDA and SCL fall time
300
300
th(STA)
START condition hold time
4.0
0.6
μs
tsu(STA)
Repeated START condition setup
time
4.7
0.6
tsu(STO)
STOP condition setup time
4.0
0.6
μs
tw(STO:STA)
STOP to START condition time (bus
free)
4.7
1.3
μs
Cb
Capacitive load for each bus line
400
400
pF



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