TDA8421 datasheet(12/26 Pages) PHILIPS

12 / 26 page

May 1988

Philips Semiconductors

Product speciﬁcation

Hi-ﬁ stereo audio processor; I2C bus

TDA8421

AC CHARACTERISTICS

VCC = 12 V; bass/treble in linear position; pseudo and spatial stereo off; RL > 10 kΩ; CL < 100 pF;

Tamb = 25 °C unless otherwise speciﬁed.

PARAMETER

SYMBOL

MIN.

TYP.

MAX.

UNIT

I2C bus timing (see Fig.6)

SDA, SCL (pin 13 and 14)

Clock frequency range

fSCL

−

100

kHz

The HIGH period of the clock

tHIGH

−−

µs

The LOW period of the clock

tLOW

4,7

−−

µs

SCL rise time

−−

µs

SCL fall time

−−

0,3

µs

Set-up time for start condition

tSU;STA

4,7

−−

µs

Hold time for start condition

tHD; STA

−−

µs

Set-up time for stop condition

tSU; STO

4,7

−−

µs

Time bus must be free before a new

transmission can start

tBUF

4,7

−−

µs

Set-up time DATA

tSU; DAT

250

−−

Input signals

IN1 L (pin 26) IN1 R (pin 28)

IN2 L (pin 1) IN2 R (pin 3)

Input signal handling (r.m.s. value)

at Vu = −4 dB; THD ≤ 0,5%

Vi(rms)

−−

Input resistance

Rn-5

−

Ω

Frequency response (

−0,5 dB)

bass and treble in linear position;

stereo mode; effects off

−

20 000

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