M24256E-FDW6TP datasheet(14/46 Pages) STMICROELECTRONICS

tên linh kiện	M24256E-FDW6TP

Giải thích chi tiết về linh kiện	256-Kbit serial I²C bus EEPROM with configurable device address and preprogrammed device address

PDF	46 Pages

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6.1.2

Page write

The page write mode allows up to 64 bytes to be written in a single write cycle, provided they are all located in the

same page in the memory: that is, the most significant memory address bits, A14/A6 are the same. If more bytes

than those that will fit up to the end of the page are sent, a “roll-over” occurs, i.e. the bytes exceeding the page

end are written on the same page, from location 0.

The bus master sends from 1 to 64 bytes of data, each one is acknowledged by the device if write control (WC) is

low. If write control (WC) is high, the contents of the addressed memory location are not modified, and each data

byte is followed by a no ACK, as shown in Figure 7. After each transferred byte, the internal page address counter

is incremented.

The transfer is terminated by the bus master generating a stop condition.

Figure 7. Write mode sequence WC = 1 (data write inhibited)

M24256E-F

Write operations on memory array

DS12687 - Rev 3

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M24256E-FDW6TP bảng dữ liệu(PDF) 14 Page - STMicroelectronics