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SAA7780 bảng dữ liệu(PDF) 20 Page - NXP Semiconductors |
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SAA7780 bảng dữ liệu(HTML) 20 Page - NXP Semiconductors |
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20 / 70 page ![]() ThunderBird Q3D PCI Audio SAA7780 Accelerator Philips Semiconductors Product Specification 1999 Sep 30 20 16650 UART Interface RXD 146 I-T UART Serial Data Input This pin provides the serial bit stream to the 550-compatible UART. This input is ignored when the Loop Mode is enabled. TXD 145 O-T UART Serial Data Output This pin is an output from UART, providing the serial bit stream to external buffers or devices. This signal is forced high whenever the transmitter is disabled, RST# is asserted, the transmit register is empty, or the UART is in the Loop Mode. RTS# 148 O-T UART Request To Send An active low output that is the inverted value of the Modem Control Register (MCR) bit 1, as follows: When MCR[1] = 1, RTS# is low. When MCR[1] = 0, RTS# is high. When RST# is asserted, RTS# is forced high. DTR# 149 O-T UART Data Terminal Ready An active low output that is the inverted value of the Modem Control Register bit 0, as follows: When MCR[0] = 1, DTR# is low. When MCR[0] = 0, DTR# is high. When RST# is asserted, DTR# is forced high. CTS# 150 I-T UART Clear To Send The status of this input can be determined by reading bit 4 of the Modem Status Register. When MSR[4] is read, it will be the inverted value of CTS#. A change in status of CTS# sets the Delta CTS bit in the Modem Status Register. If the CTS# line changes state while the modem status interrupts are enabled, an interrupt packet will be generated. DSR# 151 I-T UART Data Set Ready The status of this input can be determined by reading bit 5 of the Modem Status Register. When MSR[5] is read, it will be the inverted value of DSR#. A change in status of DSR# sets the Delta DSR bit in the Modem Status Register. If the DSR# line changes state while the modem status interrupts are enabled, an interrupt will be generated. |
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