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MPC5553 bảng dữ liệu(PDF) 27 Page - Freescale Semiconductor, Inc

tên linh kiện MPC5553
Giải thích chi tiết về linh kiện  Microcontroller Data Sheet
PDF  66 Pages
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nhà sản xuất  FREESCALE [Freescale Semiconductor, Inc]
Trang chủ  http://www.freescale.com
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MPC5553 bảng dữ liệu(HTML) 27 Page - Freescale Semiconductor, Inc

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Electrical Characteristics
MPC5553 Microcontroller Data Sheet, Rev. 2.0
Freescale Semiconductor
27
Figure 5. Reset and Configuration Pin Timing
3.13.2
IEEE 1149.1 Interface Timing
Table 20. JTAG Pin AC Electrical Characteristics1
1 These specifications apply to JTAG boundary scan only. JTAG timing specified at V
DD = 1.35–1.65 V, VDDE = 3.0–3.6 V,
VDD33 and VDDSYN = 3.0–3.6 V, TA = TL to TH, and CL = 30 pF with DSC = 0b10, SRC = 0b11. Refer to Table 21 for functional
specifications.
Spec
Characteristic
Symbol
Min
Max
Unit
1
TCK cycle time
tJCYC
100
ns
2
TCK clock pulse width (measured at VDDE ÷ 2)
tJDC
40
60
ns
3
TCK rise and fall times (40% to 70%)
tTCKRISE
—3
ns
4
TMS, TDI data setup time
tTMSS, tTDIS
5—
ns
5
TMS, TDI data hold time
tTMSH, tTDIH
25
ns
6
TCK low to TDO data valid
tTDOV
—20
ns
7
TCK low to TDO data invalid
tTDOI
0—
ns
8
TCK low to TDO high impedance
tTDOHZ
—20
ns
9
JCOMP assertion time
tJCMPPW
100
ns
10
JCOMP setup time to TCK low
tJCMPS
40
ns
11
TCK falling-edge to output valid
tBSDV
—50
ns
12
TCK falling-edge to output valid out of high impedance
tBSDVZ
—50
ns
13
TCK falling-edge to output high impedance (Hi-Z)
tBSDHZ
—50
ns
14
Boundary scan input valid to TCK rising-edge
tBSDST
50
ns
15
TCK rising-edge to boundary scan input invalid
tBSDHT
50
ns
1
2
RESET
RSTOUT
WKPCFG
PLLCFG
3
4
BOOTCFG
RSTCFG



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