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34921 bảng dữ liệu(PDF) 28 Page - Freescale Semiconductor, Inc |
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34921 bảng dữ liệu(HTML) 28 Page - Freescale Semiconductor, Inc |
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28 / 36 page ![]() Analog Integrated Circuit Device Data 28 Freescale Semiconductor 34921 FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES NORMAL MODE: Normal mode is the normal operating mode of the IC (as opposed to the Configuration mode or Information Request mode). Table 10. NORMAL Mode Input Frame Programming Model Table 11. NORMAL Input Frame Bit Allocation (29) Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 OUT2 OUT1 B B A /Cdcb A/Cdca Adcb Adca Bdcb Bdca GATE OUT A/Da2 A/Da1 A/Da0 start config Bit Bit Name Bit Description 15– 14 OUT2, OUT1 High-side or low-side output control. Bit 4 of the configuration mode input frame determines which output is controlled. Output turns on when corresponding bit is asserted. Refer to Table 20 and Table 21 Truth Tables, page 31 and page 32, respectively, for operation. 13– 10 B ,B, A,A (31) Step motor outputs, inverting. Corresponding output on when bit asserted. Refer to Table 22 Truth Table, page 32, for operation. 11– 10 A /Cdca, A/Cdcb (30) Motor driver C direction bits. Outputs follow these bits, regardless of PWM value, when they are equal; i.e., 00 or 11. Refer to Table 19 Truth Table, page 31, for operation. 9– 8 Adcb, Adca Motor driver A direction bits. Outputs follow these bits, regardless of PWM value, when the are equal; i.e., 00 or 11. Refer to Table 19 Truth Table, page 31, for operation. 7– 6 Bdcb, Bdca Motor driver B direction bits. Outputs follow these bits, regardless of PWM value, when the are equal; i.e., 00 or 11. Refer to Table 19 Truth Table, page 31, for operation. 5 GATEOUT Assertion puts Vb on the GATEOUT terminal. Deassertion connects the GATEOUT terminal to ground. 4–2 A/Da[2:0] A/D conversion target channel. These bits determine which input(s) to the ADC are to be converted. 1 start A/D conversion start bit. This bit causes the ADC to sample the input(s) specified by bits A/Da[2:0] (bits [4:2]) and begin an analog-to-digital conversion. This bit is ignored if a conversion is already in progress. 0 config The input frame can be either a configuration frame or a normal frame. Bit 0 determines the type of frame being received. Bit 0 = 0 is a normal mode input frame. Notes 29. All defaults = 0 at power up. 30. When in DC motor mode. 31. When in step motor mode, outputs are A, A, B, and B; when in DC motor mode, outputs B and B have no function. |
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