RF112 datasheet(38/45 Pages) NXP

38 / 45 page

The 160 MHz differential clock IO output can be enabled with a firmware command over

the LLCP or I2C interfaces subsequent to DLL calibration.

3.9 Specification of auxiliary functions

3.9.1 Auxiliary ADC

The auxiliary ADC will be used for internal calibration and during test.

Internal signals are routed to the AUX ADC via the analog test bus.

External signals can be applied to the AUX ADC via the ATEST1 to ATEST4 pins,

without using the analog testbus. The AUX ADC MUX has inputs directly connected to

the ATEST pads. Both single-ended and differential external signals can be connected to

the AUX ADC.

This table shows an auxiliary ADC specification.

Table 11. Auxiliary ADC specification

Parameter

Conditions

Min

Typ

Max

Unit

Conversion time

per sample

11 bits, 20 MHz

internal ADC clock

0.6

1.0

µs

Resolution

Number of

converted bits (diff

mode)

bits

Effective number of

bits

External AUX ADC

input range

Single-ended

mode,

input referred to

ground (10 bits)

1.0

Differential mode

(11 bits)

-0.9

0.9

Vpp-diff

DNL

LSB

INL

2.5

LSB

Equivalent input

noise

LSB

Input capacitance

Single ended mode

4.5

Differential mode

Common mode

level

Differential mode

0.45

Analog signal

Bandwidth

External input from

pins

0.7

MHz

Electrical characteristics

RF112 Transceiver Data Sheet, Rev. 1 Draft B, 05/2024

NXP Semiconductors

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