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MC68HC08AS32CAFN bảng dữ liệu(PDF) 35 Page - Freescale Semiconductor, Inc

tên linh kiện MC68HC08AS32CAFN
Giải thích chi tiết về linh kiện  Microcontrollers
PDF  296 Pages
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nhà sản xuất  FREESCALE [Freescale Semiconductor, Inc]
Trang chủ  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MC68HC08AS32CAFN bảng dữ liệu(HTML) 35 Page - Freescale Semiconductor, Inc

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MC68HC08AS32A — Rev. 1.1
Data Sheet
Freescale Semiconductor
35
$0029
Timer Channel 1 Status and
Control Register (TSC1)
See page 256.
Read:
CH1F
CH1IE
0
MS1A
ELS1B
ELS1A
TOV1
CH1MAX
Write:
0
Reset:
0
0
0
0
0
0
0
0
$002A
Timer Channel 1 Register High
(TCH1H)
See page 260.
Read:
Bit 15
14
13
12
11
10
9
Bit 8
Write:
Reset:
Indeterminate after reset
$002B
Timer Channel 1 Register Low
(TCH1L)
See page 260.
Read:
Bit 7
6
5
4
3
2
1
Bit 0
Write:
Reset:
Indeterminate after reset
$002C
Timer Channel 2 Status and
Control Register (TSC2)
See page 256.
Read:
CH2F
CH2IE
MS2B
MS2A
ELS2B
ELS2A
TOV2
CH2MAX
Write:
0
Reset:
0
0
0
0
0
0
0
0
$002D
Timer Channel 2 Register High
(TCH2H)
See page 260.
Read:
Bit 15
14
13
12
11
10
9
Bit 8
Write:
Reset:
Indeterminate after reset
$002E
Timer Channel 2 Register Low
(TCH2L)
See page 260.
Read:
Bit 7
6
5
4
3
2
1
Bit 0
Write:
Reset:
Indeterminate after reset
$002F
Timer Channel 3 Status and
Control Register (TSC3)
See page 256.
Read:
CH3F
CH3IE
0
MS3A
ELS3B
ELS3A
TOV3
CH3MAX
Write:
0
Reset:
0
0
0
0
0
0
0
0
$0030
Timer Channel 3 Register High
(TCH3H)
See page 260.
Read:
Bit 15
14
13
12
11
10
9
Bit 8
Write:
Reset:
Indeterminate after reset
$0031
Timer Channel 3 Register Low
(TCH3L
See page 260.)
Read:
Bit 7
6
5
4
3
2
1
Bit 0
Write:
Reset:
Indeterminate after reset
$0032
Timer Channel 4 Status and
Control Register (TSC4)
See page 256.
Read:
CH4F
CH4IE
MS4B
MS4A
ELS4B
ELS4A
TOV4
CH4MAX
Write:
0
Reset:
0
0
0
0
0
0
0
0
$0033
Timer Channel 4 Register High
(TCH4H)
See page 260.
Read:
Bit 15
14
13
12
11
10
9
Bit 8
Write:
Reset:
Indeterminate after reset
$0034
Timer Channel 4 Register Low
(TCH4L)
See page 260.
Read:
Bit 7
6
5
4
3
2
1
Bit 0
Write:
Reset:
Indeterminate after reset
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
= Unimplemented
R
= Reserved
U = Unaffected
Figure 2-2. Control, Status, and Data Register (Sheet 5 of 8)



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