RF226AP datasheet(32/46 Pages) NXP

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I2C SLAVE

Boot Clk

DIGITAL

CORE

PLL

refclk

Control

Interface

40 MHz 0.9 V

CMOS input clock

LLCP

LVDS_160M_IO_P

LVDS_160M_IO_N

Clk IO

RESTN

Mode

DILL

MHz

160

MHz

Figure 18. Generation of synthesizer references and digital clocks

This table shows the frequency generation specification.

Table 11. Frequency generation specification

Parameter

Conditions

Min

Typ

Max

Unit

VCO frequency

TRX-VCO: Lowest

19.2

GHz

TRX-VCO:

Highest

24.0

GHz

RO2-VCO: Lowest

1960

MHz

RO2-VCO:

Highest

2400

MHz

RO1-VCO: Lowest

3200

MHz

RO1-VCO:

Highest

4000

MHz

LO frequency

HB Lowest

4900

MHz

HB Highest

6000

MHz

LB Lowest

2400

MHz

LB Highest

2500

MHz

LO frequency

resolution

LO spurious free

dynamic range

Reference spurs

and integer

boundary spurs

excluded

TRX HB/LB

-65

dBc

Integrated SSB LO

phase noise

TRX HB (10 kHz

to 50 MHz)

-44

-40

dBc

Table continues on the next page...

Electrical characteristics

RF112L0H Transceiver Data Sheet, Rev. A, 12/2020

Preliminary

NXP Semiconductors

Confidential Proprietary

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