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AD9869BCPZ bảng dữ liệu(PDF) 10 Page - Analog Devices

tên linh kiện AD9869BCPZ
Giải thích chi tiết về linh kiện  Broadband Modem Mixed-Signal Front End
PDF  36 Pages
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nhà sản xuất  AD [Analog Devices]
Trang chủ  http://www.analog.com
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AD9869
Rev. 0 | Page 10 of 36
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
32
17
18
19 20
21
22
23
24
25
26 27
28
29
30 31
33
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
49
64
63
62 61
60
59
58
57
56
55 54
53
52
51 50
ADIO11/Tx[5]
ADIO8/Tx[2]
ADIO7/Tx[1]
ADIO10/Tx[4]
ADIO9/Tx[3]
ADIO6/Tx[0]
ADIO5/Tx[5]
ADIO4/Tx[4]
ADIO3/Rx[3]
ADIO2/Rx[2]
ADIO1/Rx[1]
ADIO0/Rx[0]
RXCLK
TXCLK/TXQUIET
TXEN/TXSYNC
RXEN/RXSYNC
AVSS
AVSS
IOUTN–
NC
AVDD
REFIO
REFADJ
AVDD
AVSS
RX+
RX–
REFT
AVSS
AVDD
AVSS
AD9869
TOP VIEW
(Not to Scale)
PIN 1
IDENTIFIER
AVSS
Figure 2. Pin Configuration
Table 9. Pin Function Descriptions
Pin No.
Mnemonic
Mode1
Description
1
ADIO11
HD
MSB of ADIO Buffer.
Tx[5]
FD
MSB of Tx Nibble Input.
2 to 5
ADIO10 to ADIO7
HD
Bit 10 to Bit 7 of ADIO Buffer.
Tx[4:1]
FD
Bit 4 to Bit 1 of Tx Nibble Input.
6
ADIO6
HD
Bit 6 of ADIO Buffer.
Tx[0]
FD
LSB of Tx Nibble Input.
7
ADIO5
HD
Bit 5 of ADIO Buffer.
Rx[5]
FD
MSB of Rx Nibble Output.
8, 9
ADIO4, ADIO3
HD
Bit 4 to Bit 3 of ADIO Buffer.
Rx[4:3]
FD
Bit 4 to Bit 3 of Rx Nibble Output.
10
ADIO2
HD
Bit 2 of ADIO Buffer.
Rx[2]
FD
Bit 2 of Rx Nibble Output.
11
ADIO1
HD
Bit 1 of ADIO Buffer.
Rx[1]
FD
Bit 1 of Rx Nibble Output.
12
ADIO0
HD
LSB of ADIO Buffer.
Rx[0]
FD
LSB of Rx Nibble Output.
13
RXEN
HD
ADIO Buffer Control Input.
RXSYNC
FD
Rx Data Synchronization Output.
14
TXEN
HD
Tx Path Enable Input.
TXSYNC
FD
Tx Data Synchronization Input.
15
TXCLK
HD
ADIO Sample Clock Input.
TXQUIET
FD
Fast TxDAC/IAMP Power-Down.
16
RXCLK
HD
ADIO Request Clock Input.
FD
Rx and Tx Clock Output at 2 x fADC.



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